UPD63310GK-9EU Datasheet PDF - NEC
| Part Number | UPD63310GK-9EU | |
| Description | STEREO SOUND CODEC | |
| Manufacturers | NEC | |
| Logo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD63310
STEREO SOUND CODEC
The µPD63310 is an LSI that features two channels each of on-chip 16-bit ADC and DAC circuits for mutual conversion
between digital signals and audio signals (having a maximum signal bandwidth of 24 kHz).
The analog signal input block enables mixed input of four different stereo signals and one monaural signal, and the
volume of each signal can be controlled before mixing. The µPD63310 also features two on-chip microphone amplifiers
(mic amps) and gain is adjustable between 10 and 30 dB.
The analog signal output block enables mixed output of analog signals output by the DAC and four different stereo
analog signals, and the volume of each signal can be controlled before mixing.
The digital audio signal I/O block supports a serial interface for audio applications (two’s complement, MSB first).
A 6-bit parallel port are used for the various volume settings, with volume settings selectable (in 1.5-dB steps) from –
46.5 dB to 0 dB, as well as a mute setting.
FEATURES
• Two channels each of ∆Σ type ADC and DAC
• On-chip mixing circuit in analog I/O block
• Low-noise mic amps for two channels on chip
• On-chip reference voltage power supply (1.4 V TYP.)
• ADC and DAC digital filter characteristics
Pass band ripple
: ±0.1 dB (0 to 0.454 fs) for ADC and DAC
Stop band attenuation : 75 dB (0.546 fs or above) for ADC and DAC
• Sampling frequency (fs): 2 to 48 kHz (256-fs master clock is input from an external source)
• Low voltage operation: +3 to +5.5 V single power supply
• Wide operating ambient temperature: –20 to +80°C
• Low power consumption: 120 mW (when using 3-V power supply), 250 mW (when using 5-V power supply)
• 80-pin plastic TQFP
RECOMMENDED USES
• Speech recognition system, including car navigation system
• PC sound system
ORDERING INFORMATION
Part Number
µPD63310GK-9EU
Package
80-pin plastic TQFP (FINE PITCH) (12 × 12 mm)
The information in this document is subject to change without notice.
Document No. S11319EJ7V0DS00 (7th edition)
Date Published October 1998 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1996
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µPD63310
Pin Number
Pin Name
31 MCLK
32 LRCLK
33 BCLK
34
35
36
37
38-40
41, 42
43-48
49-53
54
55
56
57
58, 59
60
61, 62
63
64
65
66
67
68
69
70
SI
NC
SO
DVDD
NC
DGND1, DGND2
DATA5-DATA0
NC
DACR
OUTR
DACL
OUTL
AGND5, AGND4
AVDD
NC
VRRI
VRRO
VRLI
VRLO
VXRI
VXRO
VXLI
NC
(2/3)
I/O Function
I Master clock input pin. Used for input of 256-fs clock (duty: 40 to 60%).
O Serial interface’s frame sync clock output pin.
Used for L channel data I/O when LRCLK = low level
Used for R channel data I/O when LRCLK = high level
O Serial interface’s bit sync clock output pin.
Used for I/O of audio data from SI and SO in sync with BCLK. BCLK is
generated on-chip as MCLK divided by eight.
I Serial interface’s data input pin. Used for serial input (synchronized with
BCLK) of audio data (two’s complement, MSB first).
— No connection
O Serial interface’s data output pin. Used for serial output (synchronized with
BCLK) of audio data (two’s complement, MSB first).
— Digital power supply pin. Used for input voltage range of +3 to +5.5 V.
— No connection
G Digital ground pins.
I/O Parallel data I/O pins. Used for input/output of address data and volume
setting data.
— No connection
O R-channel DAC output pin. When this pin is used, the R-channel DAC output
can be monitored without attenuation regardless of the volume setting.
O R-channel analog audio output pin.
O L-channel DAC output pin. When this pin is used, the L-channel DAC output
can be monitored without attenuation regardless of the volume setting.
O L-channel analog audio output pin.
G Analog ground pins.
— Analog power supply pin. Used for input voltage range of +3 to +5.5 V.
— No connection
I Reference voltage input pin for R-channel DAC. This pin is usually connected
to VRRO pin.
O Reference voltage output pin for R-channel DAC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I Reference voltage input pin for L-channel DAC. This pin is usually connected
to VRLO pin.
O Reference voltage output pin for L-channel DAC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I Reference voltage input pin for R-channel ADC. This pin is usually connected
to VXRO pin.
O Reference voltage output pin for R-channel ADC. Output is 1.4 V (TYP.).
Connects to analog GND via a bypass capacitor.
I Reference voltage input pin for L-channel ADC. This pin is usually connected
to VXLO pin.
— No connection
5
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