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PDF PCF84C81AP Data sheet ( Hoja de datos )
| Número de pieza | PCF84C81AP | |
| Descripción | Telecom microcontrollers | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
PCF84C21A; PCF84C41A;
PCF84C81A
Telecom microcontrollers
Product specification
Supersedes data of 1995 Jul 14
File under Integrated Circuits, IC14
1996 Nov 20
1 page  
Philips Semiconductors
Telecom microcontrollers
Product specification
PCF84C21A; PCF84C41A;
PCF84C81A
5 PINNING INFORMATION
5.1 Pinning
P2.2 1
SDA/P2.3 2
28 V DD
27 P2.1
SCLK 3
26 P2.0
P0.0 4
25 P1.7
P0.1 5
24 P1.6
P0.2 6
23 P1.5
P0.3 7 PCF84C21A 22 P1.4
PCF84C41A
P0.4 8 PCF84C81A 21 P1.3
P0.5 9
20 P1.2
P0.6 10
19 P1.1
P0.7 11
18 P1.0
INT/T0 12
17 RESET
T1 13
VSS 14
16 XTAL2
15 XTAL1
MBB562
Fig.2 Pin configuration.
5.2 Pin description
Table 1 DIP28 and SO28 packages
SYMBOL PIN
FUNCTION
P2.2
1 1 bit of Port 2: 4-bit
quasi-bidirectional I/O port
SDA/P2.3 2
bidirectional data line of the
I2C-bus interface, or 1 bit of
Port 2: 4-bit quasi-bidirectional
I/O port
SCLK 3 bidirectional clock line of the
I2C-bus interface
P0.0 to P0.7 4 to 11 8 bits of Port 0: 8-bit
quasi-bidirectional I/O port
INT/T0 12 Interrupt/Test 0
T1 13 Test 1/count input of 8-bit
timer/event counter 1
VSS 14 ground
XTAL1 15 crystal oscillator input or
external clock input
XTAL2 16 crystal oscillator output
RESET
17
Reset input
P1.0 to P1.7 18 to 25 8 bits of Port 1: 8-bit
quasi-bidirectional I/O port
P2.0 to P2.1 26 to 27 2 bits of Port 2: 4-bit
quasi-bidirectional I/O port
VDD 28 positive supply
6 INSTRUCTION SET
ROM is restricted to 2 kbytes for the PCF84C21A and
4 kbytes for the PCF84C41A. Therefore, the instructions
SEL MB1/2/3 for the PCF84C21A, and the instructions
SEL MB2/3 for the PCF84C41A should be avoided, as
they would define non-existing program memory banks.
As RAM is limited to 64 bytes for the PCF84C21A and to
128 bytes for the PCF84C41A, care should be taken to
avoid accesses to non-existing RAM locations.
See the “PCF84CxxxA family” data sheet for a complete
description of the instruction set.
7 HIGH SINK OUTPUT CURRENTS
The Port 1 outputs of these devices are designed for high
current drive in the logic 0 state. They are capable of
driving 10 mA loads and higher. Applications include drive
for small relays and light-emitting diodes (LEDs).
To avoid overload, care should be taken that the total
Port 1 current averages less than 80 mA, i.e. an average
of 10 mA per Port 1 line. Refer to Chapter “Limiting values”
which specifies an upper limit of 100 mA for ISS.
1996 Nov 20
5
5 Page 
Philips Semiconductors
Telecom microcontrollers
Product specification
PCF84C21A; PCF84C41A;
PCF84C81A
12 AC CHARACTERISTICS
VDD = 2.5 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C; all voltages with respect to VSS; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
tr
rise time all outputs
VDD = 5 V; Tamb = 25 °C; CL = 50 pF −
30 −
ns
tf
fall time all outputs
VDD = 5 V; Tamb = 25 °C; CL = 50 pF −
30 −
ns
fxtal clock frequency
see Fig.3
1 − 16 MHz
Table 2 I2C-bus timing (see Figs 15 and 16)
SYMBOL
PARAMETER
INPUT
(see Fig.14)
OUTPUT
(see Fig.15; note 1)
SCLK
tHD;STA
tLOW
tHIGH
tRC
tFC
SDA
tBUF
tSU;DAT
tHD;DAT
tRD
tFD
tSU;STO
START condition hold time
SCLK LOW time
SCLK HIGH time
SCLK rise time
SCLK fall time
bus free time
data set-up time
data hold time
SDA/P2.3 rise time
SDA/P2.3 fall time
STOP condition set-up time
≥ f--1x---t4-a--l
≥ -f-1x---t7-a--l
≥ f--1x---t7-a--l
≤1 µs
≤0.3 µs
≥ f--1x---t4-a--l
≥ 250 ns
≥0
≤1 µs
≤0.3 µs
≥ f--1x---t4-a--l
2-D----×F-----f-+-x--t-9a--l
2-D----×-F----f-–-x--t-3a--l ; note 2
2-D----×F-----f-+-x--t-3a--l ; note 2
≤1 µs; note 3
≤0.1 µs; note 4
≥ 4.7 µs; note 5
≥ f--1x---t5-a--l ; note 6
≥ f--x-9--t-a--l
≤1 µs; note 3
≤0.1 µs; note 4
2-D----×-F----f-–-x--t-3a--l
Notes
1. DF stands for Division Factor: the divisor of fxtal (see the “PCF84CxxxA family” data sheet).
2. Values given for ASC = 0; for ASC = 1: tHIGH = -3----(-4--D--×---F--f--x-+-t--a--1l---)-- ; tLOW = 4-D----×-F----f-–-x--t-3a--l
3. Determined by I2C-bus capacitance (Cb) and external pull-up resistor.
4. At maximum allowed I2C-bus capacitance Cb = 400 pF.
5. Determined by program.
6. If tLOW < f--2x---t4-a--l , tSU:DAT ≥ t--L---O--f-W-x--t-a--–-l---9-- , independent of ASC.
1996 Nov 20
11
11 Page | ||
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| PDF Descargar | [ Datasheet PCF84C81AP.PDF ] | |
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