UPD16808GS Datasheet PDF - NEC
| Part Number | UPD16808GS | |
| Description | MONOLITHIC DUAL H BRIDGE DRIVER CIRCUIT | |
| Manufacturers | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD16808
MONOLITHIC DUAL H BRIDGE DRIVER CIRCUIT
DESCRIPTION
The µPD16808 is a monolithic dual H bridge driver circuit which employing N-channel power MOS FETs for its driver
stage. By using the power MOS FETs for the output stage, saturation voltage and power consumption are substantially
improved as compared with conventional driver circuits that use bipolar transistors.
Because the dual H bridge driver circuits at the output stage are independent of each other, this IC is ideal as the driver
circuit for a 1- to 2-phase excitation bipolar driving stepping motor for the head actuator of an FDD.
FEATURES
• Low ON resistance (sum of ON resistors of top and bottom FETS)
RON1 = 1.0 Ω TYP. (VM = 5.0 V)
RON2 = 1.5 Ω TYP. (VM = 12.0 V)
• Low current consumption: IDD = 0.4 mA TYP.
• Four input modes independently controlling dual H bridge drivers (with 1- to 2-phase excitation selected)
• Motor voltage 12 V/5 V compatible
• Compact surface mount package: 20-pin plastic SOP (300 mil)
PIN CONFIGURATION (Top View)
C1H
C2L
VM1
1A
PGND1
2A
VDD
IN1
IN2
IN3
1
2
3
4
5
6
7
8
9
10
20 C1L
19 C2H
18 VG
17 1B
16 PGND2
15 2B
14 VM2
13 SEL
12 IN4
11 DGND
Document No. S12720EJ2V0DS00 (2nd edition)
Date Published September 1997 N
Printed in Japan
© 1997
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µPD16808
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol MIN. TYP. MAX.
Supply voltage (motor block)
Supply voltage (control block)
H bridge driver currentNote 1-/2-phase excitation
VM = 5.0 V
2-phase excitation
Charge pump capacitance
Operating temperature
VM
VDD
IDR
C1 to C3
TA
4.0
4.0
5
0
5.0 13.2
5.0 6.0
±600
±450
20
60
Note When mounted on a printed circuit board (100 × 100 × 1 mm, glass epoxy)
Unit
V
V
mA
nF
°C
ELECTRICAL SPECIFICATIONS (Within recommended operating conditions unless otherwise specified)
Parameter
OFF VM pin current
Symbol
IM
Conditions
VM = 6.0 V, VDD = 6.0 VNote 1
VM = 13.2 V, VDD = 6.0 VNote 1
VDD pin current
IDD Note 2
Control pin high-level input
IIH TA = 25 °C, VIN = VDD
current
0 ≤ TA ≤ 60 °C, VIN = VDD
Control pin low-level input
IIL TA = 25 °C, VIN = 0 V
current
0 ≤ TA ≤ 60 °C, VIN = 0 V
Control pin input pull-up
RIN TA = 25 °C
resistance
0 ≤ TA ≤ 60 °C
Control pin high-level input voltage
VIH
Control pin low-level input voltage
VIL
H bridge circuit ON
resistanceNote 3
RON relative accuracy
RON1
RON2
∆RON1
VDD = 5 V, VM = 5 V
VDD = 5 V, VM = 12 V
Excitation direction <2>, <4>Note 4
∆RON2
Excitation direction <1>, <3>
Charge pump circuit (VG) turn-ON time
TONG
VDD = 5 V, VM = 5 V
H bridge circuit turn-ON time
TONH
C1 = C2 = C3 = 10 nF
H bridge circuit turn-OFF time
TOFFH
RM = 20 Ω
Notes 1. Control pins (IN1, IN2, IN3, IN4): low
2. Control pins (IN1, IN2, IN3, IN4): high
3. Sum of ON resistances of top and bottom transistors
4. For the excitation direction, refer to FUNCTION TABLE.
MIN.
35
25
3.0
–0.3
TYP. MAX.
1.0
1.0
0.4 1.0
1.0
2.0
–0.18
–0.25
50 65
75
VDD + 0.3
0.8
1.0 2.0
1.5 3.0
±5
±10
0.2 1.0
5
5
Unit
µA
mA
mA
µA
mA
kΩ
V
V
Ω
Ω
%
ms
µs
µs
5
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| Information | Total 12 Pages | |
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