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PDF UPC659A Data sheet ( Hoja de datos )
| Número de pieza | UPC659A | |
| Descripción | 8-BIT A/D CONVERTER FOR VIDEO PROCESSING WITH REFERENCE GENERATOR AND CLAMP CIRCUIT | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µPC659A
8-BIT A/D CONVERTER FOR VIDEO PROCESSING
WITH REFERENCE GENERATOR AND CLAMP CIRCUIT
The µPC659A is a 8-bit A/D converter for video signal processing, the power consumption of which is lower than
the µPC659. The high speed and high quality bipolar processing technology has enabled fast conversion rate and
high resolution to be achieved. Conversion rate is up to 20 Msps (sampling per second) and linearity error within ±0.5
LSB while operating at low power consumption. Wide variety of application can be realized in digital application field
such as digital TV system and high speed facsimile.
Also, this IC includes sample and hold circuit, clamp circuit and reference voltage generator, which enable simple
external circuit to be constructed.
The µPC659A and the µPC659 are different in the number of clock pulses till transformed data is output
after analog signal is captured. This should be taken into consideration when using the µPC659A instead
of the µPC659. For details, refer to the timing chart.
FEATURES
• Resolution
: 8-bit
• Conversion rate
: 20 Msps
• Differential non-linearity : ±0.5 LSB MAX.
• Power supply
: +5 V
• Analog input voltage : 1.0 Vp-p
• Power consumption : 215 mW TYP.
• Built-in circuit
: Sample and hold circuit
Clamp circuit (Clamp voltage and clamp pulse must be supplied.)
Reference voltage generator (VRB = 2.3 V, VRT = 3.3 V TYP.)
ORDERING INFORMATION
Part Number
µPC659AGS
Package
24-pin plastic SOP (300 mil)
The information in this document is subject to change without notice.
Document No. S10990EJ4V0DS00 (4th edition)
Date Published July 1997 N
Printed in Japan
The mark shows major revised points.
©
1992, 1996
1 page  
Pin
Name
AGND
Pin
No.
5, 9, 12
Input/
Output
–
Function
Ground for analog circuit
DB8 to
DB4
DB3 to
DB1
13 to
17,
20 to
22
Output
Digital signal
DB8 is LSB, DB1 is MSB.
OVER 23
Output
Digital over range
Overflow (active high).
DVCC
18
DGND 19
NC 2
– Power supply for digital circuit
– Ground for digital circuit
– No Connection
µPC659A
Equivalent Circuit
AGND
DVCC DVCC
DGND DGND
DVCC
DGND
5
5 Page 
µPC659A
ATTENTION FOR APPLICATION
• Converted data output
Analog signal is captured at the rising edge, and converted data will be output at the rising edge after 1 clock pulse.
For the µPC659, 2 clock pulses.
• Analog input terminal
In case the pedestal level is clamped, the clamp circuit uses the soft clamp circuit to protect the burst level. However,
if a high impedance output is connected to the VIN pin (pin 4), the burst level will be reduced (for example, for an
external impedance of 10 Ω, the burst level is reduced by approx. 3 %).
Therefore, connect the lowest possible impedance signal to the analog signal input pin.
Low output
impedance
buffer
VIN
4
Clamp pulse
PCL
6
Clamp voltage
VCL
7
AGND
µPC659A
• If don’s use the clamp circuit
PCL pin (pin 6) and GND must be short-circuit. And insert by-pass capacitor of about 0.1 µF between the VCL pin
(pin 7) and GND. Input analog signal to VIN pin (pin 4).
In case an external clamp circuit is used, connect the PCL pin (pin 6) to GND, and leave the VCL pin (pin 7)
unconnected. Set the voltage of the VIN pin (pin 4) between 2.3 V and 3.3 V.
• Clamp voltage
There is a few difference clamp voltage between the supply clamp voltage VCL (pin 7) and really clamp voltage.
Really clamp voltage = VCL + α
Take account of the α (about ±20 mV) at supply VCL to pin 7.
• When reference voltage is set from external, VRB (pin 10) = 2.3 V, VRT (pin 1) = 3.3 V .
• Circuit current
Analog circuit current
Digital circuit current
Sum
TYP. (Unit: mA)
37
6
43
• Set the sampling clock frequency between 1 MHz and 20 MHz. If a frequency outside this range is used, the internal
sample-and-hold circuit will not function properly.
• First apply 5 V to the AVCC pins (pins 3 and 11) and the DVCC pin (pin 18), then input the analog signal to the VIN
pin (pin 4). If the analog signal is input first, the output data may latch up.
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet UPC659A.PDF ] | |
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