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NEC - SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE

Numéro de référence UPA1730
Description SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE
Fabricant NEC 
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UPA1730 fiche technique
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1730
SWITCHING
P-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
The µ PA1730 is P-Channel MOS Field Effect Transis-
tor designed for power management applications of
notebook computers and Li-ion battery protection circuit.
FEATURES
Low on-resistance
RDS(on)1 = 9.5 mMAX. (VGS = –10 V, ID = –6.5 A)
RDS(on)2 = 13.5 mMAX. (VGS = –4.5 V, ID = –6.5 A)
5 RDS(on)3 = 15.0 mMAX. (VGS = –4.0 V, ID = –6.5 A)
Low Ciss : Ciss = 3800 pF TYP.
Built-in G-S protection diode
Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA1730G
Power SOP8
PACKAGE DRAWING (Unit : mm)
85
1,2,3 ; Source
4 ; Gate
5,6,7,8 ; Drain
14
5.37 MAX.
6.0 ±0.3
4.4
0.8
1.27 0.78 MAX.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
VDSS –30 V
Gate to Source Voltage (VDS = 0 V)
VGSS
# 20
V
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation (TA = 25°C) Note2
ID(DC)
ID(pulse)
PT
# 13.0
# 52.0
2.2
A
A
W
Channel Temperature
Tch 150 °C
Storage Temperature
Tstg –55 to +150 °C
EQUIVALENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW 10 µs, Duty Cycle 1 %
2. Mounted on ceramic substrate of 1200 mm2 x 2.2 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G14284EJ1V0DS00 (1st edition)
Date Published November 1999 NS CP(K)
Printed in Japan
The mark 5 shows major revised points.
©
1999

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