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PDF UPA1715 Data sheet ( Hoja de datos )
| Número de pieza | UPA1715 | |
| Descripción | SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE | |
| Fabricantes | NEC | |
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DATA SHEET
MOS FIELD EFFECT TRANSISTOR
µ PA1715
SWITCHING
P-CHANNEL POWER MOS FET
INDUSTRIAL USE
DESCRIPTION
This product is P-Channel MOS Field Effect Transistor designed for power management applications of notebook
computers and Li-ion battery protection circuit.
FEATURES
• Low on-resistance
RDS(on)1 = 8.5 mΩ TYP. (VGS = –10 V, ID = –6.0 A)
RDS(on)2 = 11.0 mΩ TYP. (VGS = –4.5 V, ID = –6.0 A)
RDS(on)3 = 12.0 mΩ TYP. (VGS = –4.0 V, ID = –6.0 A)
• Low Ciss : Ciss = 3800 pF TYP.
• Built-in G-S protection diode
• Small and surface mount package (Power SOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
µ PA1715G
Power SOP8
PACKAGE DRAWING (Unit : mm)
85
14
5.37 Max.
1,2,3 ; Source
4 ; Gate
5,6,7,8 ; Drain
6.0 ±0.3
4.4
0.8
1.27 0.78 Max.
0.40
+0.10
–0.05
0.12 M
0.5 ±0.2
0.10
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.)
Drain to Source Voltage (VGS = 0 V)
Gate to Source Voltage (VDS = 0 V)
Drain Current (DC)
Drain Current (pulse) Note1
Total Power Dissipation (TA = 25°C) Note2
VDSS
VGSS
ID(DC)
ID(pulse)
PT
–30
# 20
#11
# 44
2.0
V
V
A
A
W
Channel Temperature
Tch 150
°C
Storage Temperature
Tstg –55 to +150
°C
EQUIVARENT CIRCUIT
Drain
Gate
Body
Diode
Gate
Protection
Diode
Source
Notes 1. PW ≤ 10 µ s, Duty Cycle ≤ 1 %
2. Mounted on ceramic substrate of 1200 mm2 x 0.7 mm
Remark
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. G13669EJ1V0DS00 (1st edition)
Date Published March 1999 NS CP(K)
Printed in Japan
©
1998, 1999
1 page  
µ PA1715
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
20
18 VGS = −4 V
16 −4.5 V
14
−10 V
12
10
8
6
ID = −6 A
4
−50 0 50 100 150
Tch - Channel Temperature - ˚C
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
1 000
100
Ciss
Coss
Crss
VGS = 0 V
f = 1 MHz
−0.1 −1 −10
VDS - Drain to Source Voltage - V
−100
REVERSE RECOVERY TIME vs.
DIODE CURRENT
di/dt = 100 A/µ s
VGS = 0 V
100
10
−0.1
−1 −10
IF - Diode Current - A
−100
SOURCE TO DRAIN DIODE
FORWARD VOLTAGE
100
VGS = −4.5 V
Pulsed
10 0 V
1
0.1
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VF - Source to Drain Voltage - V
1 000
100
SWITCHING CHARACTERISTICS
td(off)
tf
tr
td(on)
10
1
−0.1
VDS = −15 V
VGS = −10 V
RG = 10Ω
−1 −10 −100
ID - Drain Current - A
DYNAMIC INPUT/OUTPUT CHARACTERISTICS
−40
ID = −11.0 A
−30
VDS = −24 V
VGS
−15 V
−20 −6 V
−10
VDS
0 10 20 30 40 50 60 70
QG - Gate Charge - nC
−12
−10
−8
−6
−4
−2
0
Data Sheet G13669EJ1V0DS00
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet UPA1715.PDF ] | |
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