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Integrated Device - INTEGRATED RISController FOR LOW-COST SYSTEMS

Numéro de référence IDT79RV3041-20
Description INTEGRATED RISController FOR LOW-COST SYSTEMS
Fabricant Integrated Device 
Logo Integrated Device 





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IDT79RV3041-20 fiche technique
Integrated Device Technology, Inc.
IDT79R3041
INTEGRATED RISControllerFOR
LOW-COST SYSTEMS
IDT79R3041
IDT79RV3041
FEATURES:
• Instruction set compatible with IDT79R3000A
and RISController Family MIPS RISC CPUs
• High level of integration minimizes system cost
— RISC CPU
— Multiply/divide unit
— Instruction Cache
— Data Cache
— Programmable bus interface
— Programmable port width support
• On-chip instruction and data caches
— 2KB of Instruction Cache
— 512B of Data Cache
• Flexible bus interface allows simple, low-cost designs
— Superset pin-compatible with RISController
— Adds programmable port width interface
(8-, 16-, and 32-bit memory sub-regions)
— Adds programmable bus interface timing support
(Extended address hold, Bus turn around time,
Read/write masks)
• Double-frequency clock input
• 16.67MHz, 20MHz, 25MHz and 33MHz operation
• 20MIPS at 25MHz
• Low cost 84-pin PLCC packaging
• On-chip 4-deep write buffer eliminates memory write stalls
• On-chip 4-word read buffer supports burst or simple block
reads
• On-chip DMA arbiter
• On-chip 24-bit timer
• Boot from 8-bit, 16-bit, or 32-bit wide PROMs
• Pin- and software-compatible family includes R3041, R3051,
R3052, and R3081
• Complete software support
— Optimizing compilers
— Real-time operating systems
— Monitors/debuggers
— Floating Point emulation software
— Page Description Languages
ClkIn
Clock
Generator
Unit
Int(5:3), SInt(2:0)
TC
Master Pipeline Control SBrCond(3:2)
System Control
Coprocessor
Exception/Control
Registers
Bus Interface
Registers
PortSize
Register
Counter
Registers
Integer
CPU Core
General Registers
(32 x 32)
ALU
Shifter
Mult/Div Unit
Address Adder
PC Control
Virtual Address
32
Physical Address Bus
Instruction
Cache
2kB
Data
Cache
512B
32
4-deep
Write
Buffer
Data
Unpack
Unit
Data Bus
R3051 Superset
Bus Interface Unit
4-deep
Read
Buffer
DMA
Arbiter
BIU
Control
Data
Pack
Unit
Timing/ Interface
Control
Address/
Data
DMA Rd/Wr SysClk
Ctrl Ctrl
2905 drw 01
Figure 1. R3041 Block Diagram
RISController, R3041, R3051, R3052, R3081, ORION, IDT/sim, and IDT/kit are trademarks, and the IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1996 Integrated Device Technology, Inc.
MARCH 1996
DSC-2905/5
1

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