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What is IDT79R3051-40J?

This electronic component, produced by the manufacturer "Integrated Device", performs the same function as "RISControllers".


IDT79R3051-40J Datasheet PDF - Integrated Device

Part Number IDT79R3051-40J
Description RISControllers
Manufacturers Integrated Device 
Logo Integrated Device Logo 


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Integrated Device Technology, Inc.
IDT79R3051/79R3052
RISControllers
IDT79R3051, 79R3051E
IDT79R3052, 79R3052E
FEATURES:
• Instruction set compatible with IDT79R3000A and
IDT79R3001 MIPS RISC CPUs
• High level of integration minimizes system cost, power
consumption
— IDT79R3000A /IDT79R3001 RISC Integer CPU
— R3051 features 4KB of Instruction Cache
— R3052 features 8KB of Instruction Cache
— All devices feature 2kB of Data Cache
— “E” Versions (Extended Architecture) feature full
function Memory Management Unit, including 64-
entry Translation Lookaside Buffer (TLB)
— 4-deep write buffer eliminates memory write stalls
— 4-deep read buffer supports burst refill from slow
memory devices
— On-chip DMA arbiter
— Bus Interface minimizes design complexity
• Single clock input with 40%-60% duty cycle
• 35 MIPS, over 64,000 Dhrystones at 40MHz
• Low-cost 84-pin PLCC packaging that's pin-/package-
compatible with thermally enhanced 84-pin MQUAD.
• Flexible bus interface allows simple, low-cost designs
• 20, 25, 33, and 40MHz operation
• Complete software support
— Optimizing compilers
— Real-time operating systems
— Monitors/debuggers
— Floating Point Software
— Page Description Languages
Clk2xIn
Int(5:0)
Clock
Generator
Unit
Master Pipeline Control
BrCond(3:0)
System Control
Coprocessor
Integer
CPU Core
Exception/Control
Registers
General Registers
(32 x 32)
Memory Management
Registers
ALU
Shifter
Translation
Lookaside Buffer
(64 entries)
Mult/Div Unit
Address Adder
PC Control
Virtual Address
32
Physical Address Bus
Instruction
Cache
(8kB/4kB)
Data
Cache
(2kB)
4-deep
Write
Buffer
Data Bus
Bus Interface Unit
4-deep
Read
Buffer
DMA
Arbiter
BIU
Control
32
Address/
Data
DMA Rd/Wr SysClk
Ctrl Ctrl
Figure 1. R3051 Family Block Diagram
2874 drw 01
The IDT logo is a registered trademark, and RISChipset, RISController, R3041, R3051, R3052, R3071, R3081, R3720, R4400 and R4600 are trademarks of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
©1995 Integrated Device Technology, Inc.
5.3
SEPTEMBER 1995
DSC-3000/5
1

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IDT79R3051-40J equivalent
IDT79R3051/79R3052 INTEGRATED RISControllers
COMMERCIAL TEMPERATURE RANGE
• Sable, an instruction set simulator.
• Optimizing compilers from MIPS, the acknowledged leader
in optimizing compiler technology.
• IDT Cross development tools, available in a variety of
development environments.
• The high-performance IDT floating point library software,
which has been integrated into the compiler toolchain to
allow software floating point to replace hardware floating
point without modifying the original source code.
• The IDT Evaluation Board, which includes RAM, EPROM,
I/O, and the IDT Prom Monitor.
• The IDT Laser Printer System board, which directly drives
a low-cost print engine, and runs Microsoft TrueImage
Page Description Language on top of PeerlessPageAd-
vanced Printer Controller BIOS.
• Adobe PostScriptPage Description Language, ported to
the R3000 instruction set, runs on the IDT79R3051 family.
• The IDT Prom Monitor, which implements a full prom
monitor (diagnostics, remote debug support, peek/poke,
etc.).
• An In-Circuit Emulator, developed and sold by Embedded
Performance, Inc.
Reset
Clk2xIn
Int(5:0)
BrCond(3:0)
IDT R3051 Family
RISController
BusReq
BusGnt
Burst/
Wr RdCEn WrNear
AD(31:0) ALE Addr(3:2) SysClk Rd Ack DataEn BErr
FCT373T
DRAM Control
PALs
DRAM
FCT245T
Memory and Interface
Control PALs
Address
Decode
PAL
EPROM
I/O Devices/
Peripherals
Figure 5. Typical R3051 Family Based System
5.3
System I/O
2874 drw 05
5


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