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PDF IDT74LVC32ADC Data sheet ( Hoja de datos )
| Número de pieza | IDT74LVC32ADC | |
| Descripción | 3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE WITH 5 VOLT TOLERANT I/O | |
| Fabricantes | Integrated Device | |
| Logotipo |  |
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IDT74LVC32A
3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE
INDUSTRIALTEMPERATURERANGE
3.3V CMOS
QUADRUPLE 2-INPUT
POSITIVE-OR GATE
WITH 5 VOLT TOLERANT I/O
IDT74LVC32A
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• VCC = 3.3V ± 0.3V, Normal Range
• VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• All inputs, outputs, and I/Os are 5V tolerant
• Supports hot insertion
• Available in SOIC, SSOP, and TSSOP packages
DESCRIPTION:
The LVC32A quadruple 2-input positive -OR gate is built using advanced
dual metal CMOS technology. The LVC32A device performs the Boolean
function Y = A + B or Y = A · B in positive logic.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environment.
The LVC32A has been designed with a ±24mA output driver. This driver
is capable of driving a moderate to heavy load while maintaining speed
performance.
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
1A 1
14 VCC
A
1B 2
13 4B
Y
B
1Y 3
12 4A
2A 4
11 4Y
2B 5
10 3B
2Y 6
9 3A
GND 7
8 3Y
SOIC/ SSOP/ TSSOP
TOP VIEW
PIN DESCRIPTION
Pin Names
Description
xA, xB
xY
Inputs
Outputs
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
©1999 Integrated Device Technology, Inc.
FUNCTION TABLE (EACH GATE)(1)
Inputs
xA xB
HX
XH
LL
Output
xY
H
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
OCTOBER 1999
1
DSC-4583/1
1 page  
IDT74LVC32A
3.3V CMOS QUADRUPLE 2-INPUT POSITIVE-OR GATE
ORDERING INFORMATION
IDT XX LVC XXXX
XX
Temp. Range
Device Type Package
INDUSTRIALTEMPERATURERANGE
DC Small Outline IC
PY Shrink Small Outline Package
PG Thin Shrink Small Outline Package
32A Quadruple 2-Input Positive-OR Gate, ±24mA
74 -40°C to +85°C
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
for Tech Support:
(408) 654-6459
5
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet IDT74LVC32ADC.PDF ] | |
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