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National Semiconductor - LPC SuperI/O with Glue Functions

Numéro de référence PC87372
Description LPC SuperI/O with Glue Functions
Fabricant National Semiconductor 
Logo National Semiconductor 





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PC87372 fiche technique
October 2002
Revision 1.2
PC87372
LPC SuperI/O with Glue Functions
General Description
The National Semiconductor® PC87372 Advanced I/O prod-
uct is a member of the PC8737x SuperI/O family. All
PC8737x devices are highly integrated and are pin and soft-
ware compatible, thus providing drop-in interchangeability
and enabling a variety of assembly options using only a sin-
gle motherboard and BIOS.
PC87372 integration allows for a smaller system board size and
saves on total system cost.
The PC87372 includes legacy SuperI/O functions, system
glue functions, fan monitoring and control, commonly used
functions such as GPIO, and ACPI-compliant Power Man-
agement support.
The PC87372 integrates miscellaneous analog and digital
system glue functions to reduce the number of discrete
components required. The host communicates with the
functions integrated in the PC87372 device through an LPC
Bus Interface.
The PC87372 Legacy functions are: a serial port (UART), a
fully compliant IEEE 1284 Parallel Port, a Floppy Disk Con-
troller (FDC) and a Keyboard/Mouse Controller (KBC).
The Fan Speed Monitor (FSM) module allows the system to
monitor two fans.
The PC87372 extended wake-up support complements the
ACPI controller in the chipset. The System Wake-Up Control
(SWC) module, powered by VSB3, supports a flexible wake-
up mechanism.
There are 13 General-Purpose Input/Output (GPIO) ports;
these allow system control and wake-up on system events.
Outstanding Features
s Legacy modules: Parallel Port, Floppy Disk Controller
(FDC), Serial Port and a Keyboard and Mouse Control-
ler (KBC)
s Glue functions to complement the South Bridge func-
tionality
s Fan Speed monitoring of two fans
s VSB3-powered Power Management with 20 wake-up
sources
s Controls three LED indicators
s 13 GPIO ports with a variety of wake-up options
s LPC interface, based on Intel’s LPC Interface Specifica-
tion Revision 1.0, September 29th, 1997
s PC01 Revision 1.0 and Advanced Configuration and Pow-
er Interface (ACPI) Specification Revision 2.0 compliant
s 128-pin PQFP package
Block Diagram
14.31818 MHz
Serial
Interface
Parallel Port Floppy Drive Keyboard Mouse
LPC Serial
Interface
Interface Interface Interface Interface IRQ
Clock
Generator
Serial Port
48 MHz
IEEE 1284
Parallel Port
Floppy Disk
Keyboard &
Controller Mouse Controller
Internal Bus
LPC Bus
Interface
VDD3
Fan Speed
Monitor
Tachometer
Inputs
Glue
Functions
System
Wake-Up Control GPIO Ports
Miscellaneous Wake-Up PME
I/O Events
I/O
Ports
PnP
Configuration
Registers
VSB3
32.768 KHz
National Semiconductor and TRI-STATE are registered trademarks of National Semiconductor Corporation. All other brand or product names are trademarks
or registered trademarks of their respective holders.
© 2002 National Semiconductor Corporation
www.national.com

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