|
|
PDF PC87351 Data sheet ( Hoja de datos )
| Número de pieza | PC87351 | |
| Descripción | PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PC87351 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
PRELIMINARY
May 1998
PC87351 PC98 and ACPI Compliant SuperI/O with
System Wake-Up Control
Highlights
General Description
The PC87351, a member of National Semiconductor’s Su-
perI/O family of integrated PC peripherals, is a 128-pin,
PC98 and ACPI compliant SuperI/O that offers a single-chip
solution to the most commonly used ISA peripherals.
The PC87351 incorporates: a Floppy Disk Controller (FDC)
which is available also on the Parallel Port pins as a multi-
plexed option (PPM), two enhanced Serial Ports, Infrared
Comunication Port (HP-SIR, Sharp-IR, and Consumer
Electronics-IR), a full IEEE 1284 Parallel Port, a Keyboard
and Mouse Controller (KBC), System Wake-Up Control
(SWC), General-Purpose Input/Output (GPIO) Ports with
assert interrupt capability, and Fan Speed Control (FSC).
Outstanding Features
• Fan Speed Control for two fans
• 11 General-Purpose I/O Ports, bi-directional, with in-
terrupt assertion capability
• System Wake-Up Control powered by VSB, generates
power-up request in response to preprogrammed key-
board or mouse sequence, modem, telephone ring,
and two general-purpose events without an external
clock
• Serial or parallel IRQ support
• Programmable write protect for Floppy Disk Controller
• Power-fail recovery support
Block Diagram
Serial
Interface
Serial Infrared
Interface Interface
Floppy Drive
Interface
Parallel Port/
Floppy Drive
Interface
PPM
ISA
Interface SERIRQ
Serial Port 1
Serial Port 2
with IR
Floppy Disk
Controller
IEEE 1284
Parallel Port
Host Interface
VSB
VBAT
System Wake-Up
Control
Fan Speed Control
General-Purpose
I/O
Keyboard and Mouse
Controller
Wake-Up PWUREQ FANOUT0 FANOUT1
Events
I/O Ports Keyboard and Mouse Ports
Interface
IBM®, MicroChannel®, PC-AT® and PS/2® are registered trademarks of International Business Machines Corporation.
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation
www.national.com
1 page  
Datasheet Revision Record (Continued)
Item
Topic
Change/Correction
Location
17 Keyboard Data Shift Register
Description modified
Section 3.4.6
18 Mouse Data Shift Register
Description modified
Section 3.4.7
19 Ports with fewer than 8 bits
Implementation description
Chapter 4
20 Interrupt Assertion and Handling
Bit nomenclature modified
Section 4.3
21 GPIO Pin Configuration Access Register Bit nomenclature and descriptions changed
Section 4.4.1
22 GPIO Data Out Register
Bitmap and Reset values added
Section 4.4.3
23 GPIO Data In Register
Bitmap and Reset values added
Section 4.4.4
24 GPIO Interrupt Enable Register
Bitmap and Reset values added
Section 4.4.5
25 GPIO Status Register
Bitmap and Reset values added
Section 4.4.6
26 Functional Description
Corrected and enhanced
Section 5.2
27 Fan Control Duty Cycle Register
Bits 7-0
00h: PWM output is continuously low
Section 5.3.3
01h-FEh: PWM output is high for [Duty Cycle Value] clock
cycles and low for [256-Duty Cycle Value] clock cycles
FFh: PWM output is continuously high
28 Device Specifications
Timing diagrams drawn more precisely
Chapter 11
29 VBAT Battery Supply Current
Conditions and Max modified
Section 11.1.4
30 Host Interface I/O Cycle Timing
tRDYA, tRDYl and tRWl added to table; footnote 2 added Section 11.2.3
to table; IOCHRDY timing diagram added
31 Serial IRQ Timing
Output timing diagram modified
Section 11.2.6
www.national.com
5
5 Page 
1.0 Signal/Pin Connection and Description
1.1 CONNECTION DIAGRAM
WDATA
STEP
DIR
MTR1
DR0
DR1
MTR0
INDEX
DRATE0
DENSEL
NC
NC
SLCT/WGATE
PE/WDATA
BUSY/WAIT/MTR1
ACK/DR1
PD7/MSEN1
PD6/DRATE0
PD5/MSEN0
PD4/DSKCHG
VSS
VDD
PD3/RDATA
SLIN/ASTRB/STEP
PD2/WP
INIT/DIR
PD1/TRK0
ERR/HDSEL
PD0/INDEX
AFD/DSTRB/DENSEL
STB/WRITE
NC
NC
KBRST/GPIO17/P12/PNF
GA20/GPIO20
KBCLK
KBDAT
MCLK
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
PC87351-xxx/VLA
38 GPIO11/IRQ5
37 GPIO10/IRQ4
36 NC
35 SERIRQ/IRQ3
34 PCICLK/IRQ1
33 NC
32 IOWR
31 IORD
30 IOCHRDY
29 AEN
28 A15
27 A14
26 A13
25 A12
24 A11
23 A10
22 A9
21 A8
20 A7
19 A6
18 VSS
17 VDD
16 A5
15 A4
14 A3
13 A2
12 A1
11 A0
10 D7
9 D6
8 D5
7 D4
6 D3
5 D2
4 D1
3 D0
2 NC
1 NC
Plastic Quad Flatpack (PQFP), JEDEC
Order Number PC87351-xxx/VLA
See NS Package Number VLA128A
xxx = Three character identifier for National data, and keyboard ROM and/or customer identification code
11 www.national.com
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PC87351.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PC87351 | PC87351 PC98 and ACPI Compliant SuperI/O with System Wake-Up Control | National Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |