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Integrated Device - FAST CMOS PARITY BUS TRANSCEIVER

Numéro de référence IDT74FCT833BP
Description FAST CMOS PARITY BUS TRANSCEIVER
Fabricant Integrated Device 
Logo Integrated Device 





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IDT74FCT833BP fiche technique
®
Integrated Device Technology, Inc.
FAST CMOS
PARITY BUS
TRANSCEIVER
IDT54/74FCT833A
IDT54/74FCT833B
FEATURES:
• Equivalent to AMD’s Am29833 bipolar parity bus
transceiver in pinout/function, speed and output drive
over full temperature and voltage supply extremes
• High-speed bidirectional bus transceiver for processor-
organized devices
• IDT54/74FCT833A equivalent to Am29833A speed and
output drive
• IDT54/74FCT833B 30% faster than Am29833A
• Buffered direction and three-state controls
• Error flag with open-drain output
• IOL = 48mA (commercial) and 32mA (military)
• TTL input and output level compatible
• CMOS output level compatible
• Substantially lower input current levels than AMD’s
bipolar Am29800 series (5µA max.)
• Available in plastic DIP, CERDIP, LCC and SOIC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT833s are high-performance bus
transceivers designed for two-way communications. They
each contain an 8-bit data path from the R (port) to the T (port),
an 8-bit data path from the T (port) to the R (port), and a 9-bit
parity checker/generator. The error flag can be clocked and
stored in a register and read at the ERR output. The clear
(CLR) input is used to clear the error flag register.
The output enables OET and OER are used to force the
port outputs to the high-impedance state so that the device
can drive bus lines directly. In addition, OER and OET can be
used to force a parity error by enabling both lines
simultaneously. This transmission of inverted parity gives the
designer more system diagnostic capability. The devices are
specified at 48mA and 32mA output sink current over the
commercial and military temperature ranges, respectively.
FUNCTIONAL BLOCK DIAGRAM
RI
8
8 TI
OET
OER
CLK
CLR
8
S MUX
8
9
9-BIT
PARITY TREE
P
PARITY
DQ
Q
CP
CLR
ERR
2557 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1992 Integrated Device Technology, Inc.
7.21
MAY 1992
DSC-4621/2
1

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