DataSheetWiki


PALLV22V10Z-25JI fiches techniques PDF

Lattice Semiconductor - Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device

Numéro de référence PALLV22V10Z-25JI
Description Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device
Fabricant Lattice Semiconductor 
Logo Lattice Semiconductor 





1 Page

No Preview Available !





PALLV22V10Z-25JI fiche technique
PALLV22V10 COM'L: -7/10/15
PALLV22V10Z
IND: -15
IND: -25
PALLV22V10 and PALLV22V10Z Families
Low-Voltage (Zero Power) 24-Pin EE CMOS
Versatile PAL Device
DISTINCTIVE CHARACTERISTICS
x Low-voltage operation, 3.3 V JEDEC compatible
— VCC = + 3.0 V to 3.6 V
x Commercial and industrial operating temperature range
x 7.5-ns tPD
x Electrically-erasable technology provides reconfigurable logic and full testability
x 10 macrocells programmable as registered or combinatorial, and active high or active low to
match application needs
x Varied product term distribution allows up to 16 product terms per output for complex
functions
x Global asynchronous reset and synchronous preset for initialization
x Power-up reset for initialization and register preload for testability
x Extensive third-party software and programmer support
x 24-pin SKINNY DIP and 28-pin PLCC packages save space
GENERAL DESCRIPTION
The PALLV22V10 is an advanced PAL® device built with low-voltage, high-speed, electrically-
erasable CMOS technology.
The PALLV22V10Z provides low voltage and zero standby power. At 30 µA maximum standby
current, the PALLV22V10Z allows battery powered operation for an extended period.
The PALLV22V10 device implements the familiar Boolean logic transfer function, the sum of
products. The PAL device is a programmable AND array driving a fixed OR array. The AND array
is programmed to create custom product terms, while the OR array sums selected terms at the
outputs.
The product terms are connected to the fixed OR array with a varied distribution from 8 to 16
across the outputs (see Block Diagram). The OR sum of the products feeds the output macrocell.
Each macrocell can be programmed as registered or combinatorial, and active high or active low.
The output configuration is determined by two bits controlling two multiplexers in each macrocell.
Publication# 18956 Rev: F
Amendment/0
Issue Date: September 2000

PagesPages 19
Télécharger [ PALLV22V10Z-25JI ]


Fiche technique recommandé

No Description détaillée Fabricant
PALLV22V10Z-25JI Low-Voltage Zero Power 24-Pin EE CMOS Versatile PAL Device Lattice Semiconductor
Lattice Semiconductor

US18650VTC5A

Lithium-Ion Battery

Sony
Sony
TSPC106

PCI Bus Bridge Memory Controller

ATMEL
ATMEL
TP9380

NPN SILICON RF POWER TRANSISTOR

Advanced Semiconductor
Advanced Semiconductor


www.DataSheetWiki.com    |   2020   |   Contactez-nous  |   Recherche