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PDF RF1S70N03SM Data sheet ( Hoja de datos )
| Número de pieza | RF1S70N03SM | |
| Descripción | 70A/ 30V/ 0.010 Ohm/ N-Channel Power MOSFETs | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
RFP70N03, RF1S70N03SM
July 1999 File Number 3404.4
70A, 30V, 0.010 Ohm, N-Channel Power
MOSFETs
These N-Channel power MOSFETs are manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers, and relay drivers. These transistors can be operated
directly from integrated circuits.
Formerly developmental type TA49025.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFP70N03
TO-220AB
RFP70N03
RF1S70N03SM
TO-263AB
F1S70N03
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in tape and reel, e.g., RF1S70N03SM9A
Packaging
JEDEC TO-220AB
DRAIN
(FLANGE)
SOURCE
DRAIN
GATE
Features
• 70A, 30V
• rDS(ON) = 0.010Ω
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve (Single Pulse)
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-263AB
GATE
SOURCE
DRAIN
(FLANGE)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
RFP70N03, RF1S70N03SM
Typical Performance Curves (Continued)
30.0
22.5
VDD = BVDSS
VDD = BVDSS
10.0
7.5
15.0
0.75BVDSS
0.75BVDSS
0.50BVDSS
0.50BVDSS
7.5
0.25BVDSS
0.25BVDSS
RL = 0.43Ω
Ig(REF) = 3.0mA
VGS = 10V
0
20 I-I-gg----((--AR----CE----F-T---)-)
t, TIME (µs)
80 I-I-gg----((--AR----CE----F-T---)-)
5.0
2.5
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 12. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01Ω
0
tP
IAS
BVDSS
tAV
VDS
VDD
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
VDS
VGS
VGS
RGS
RL
DUT
+
VDD
-
FIGURE 15. SWITCHING TIME TEST CIRCUIT
5
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 16. SWITCHING WAVEFORMS
5 Page 
RFP70N03, RF1S70N03SM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
0
0 25 50 75 100 125 150 175
TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
80
70
60
50
40
30
20
10
0
25
50 75 100 125 150
TC, CASE TEMPERATURE (oC)
175
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
100
0.5
0.2
10-1 0.1
0.05
0.02
0.01
10-120-5
SINGLE PULSE
10-4
10-3
10-2
10-1
t1, RECTANGULAR PULSE DURATION (s)
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
10-0
101
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
300
100µs
100
1ms
OPERATION IN THIS
AREA MAY BE
10 LIMITED BY rDS(ON)
TC = 25oC
TJ = MAX RATED
1 SINGLE PULSE
1
VDSS(MAX) = 30V
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
10ms
100ms
DC
50
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
300
IDM STARTING TJ = 25oC
STARTING TJ = 150oC
100
If R = 0
tAV = (L) (IAS)/(1.3 x RATED BVDSS - VDD)
If R ≠ 0
10 tAV = (L/R) ln [(IAS x R)/(1.3 x RATED BVDSS - VDD) +1]
0.01
0.10
1
tAV, TIME IN AVALANCHE (ms)
10
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 5. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
3
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet RF1S70N03SM.PDF ] | |
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