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PDF RF1K49221 Data sheet ( Hoja de datos )

Número de pieza RF1K49221
Descripción 2.5A/ 60V/ 0.130 Ohm/ ESD Rated/ Dual N-Channel LittleFET Power MOSFET
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
RF1K49221
August 1999 File Number 4314.1
2.5A, 60V, 0.130 Ohm, ESD Rated, Dual
N-Channel LittleFET™ Power MOSFET
The RF1K49221 Dual N-Channel power MOSFET is
manufactured using an advanced MegaFET process. This
process, which uses feature sizes approaching those of LSI
integrated circuits, gives optimum utilization of silicon,
resulting in outstanding performance. It is designed for use
in applications such as switching regulators, switching
converters, motor drivers, relay drivers, and low voltage bus
switches. This device can be operated directly from
integrated circuits.
The RF1K49221 incorporates ESD protection and is
designed to withstand 2kV (Human Body Model) of ESD.
Formerly developmental type TA49221.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RF1K49221
MS-012AA
RF1K49221
NOTE: When ordering, use the entire part number. For ordering in
tape and reel, add the suffix 96 to the part number, i.e. RF1K4922196.
Features
• 2.5A, 60V
• rDS(ON) = 0.130
• 2kV ESD Protected
• Temperature Compensating PSPICE® Model
• Thermal Impedance PSPICE Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
S1(1)
G1(2)
D1(8)
D1(7)
S2(3)
G2(4)
D2(6)
D2(5)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
8-136
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
LittleFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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RF1K49221 pdf
RF1K49221
Typical Performance Curves (Continued)
1.2
ID = 250µA
1.1
1.0
0.9
0.8
-80
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
50 0
CISS
400
VGS = 0V, f = 1MHz
300 CISS = CGS + CGD
CRSS = CGD
COSS
COSS = CDS + CGD
200
100
0
0
CRSS
5 10 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
60
VDD = BVDSS
VDD = BVDSS
10.0
45 7.5
RL = 24W
30
Ig(REF) = 0.30mA
VGS = 10V
PLATEAU VOLTAGES IN
DESCENDING ORDER:
15 VDD = BVDSS
VDD = 0.75 BVDSS
VDD = 0.50 BVDSS
VDD = 0.25 BVDSS
0
20 I-I-g-g----((--AR-----CE----F-T---)-)
t, TIME (ms)
80 I-I-g-g----((--AR-----CE----FT----)-)
5.0
2.5
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
RG
tP
0V
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
8-140

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