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PDF RF1K49157 Data sheet ( Hoja de datos )
| Número de pieza | RF1K49157 | |
| Descripción | 6.3A/ 30V/ 0.030 Ohm/ Single N-Channel LittleFET Power MOSFET | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Data Sheet
RF1K49157
August 1999 File Number 4012.5
6.3A, 30V, 0.030 Ohm, Single N-Channel
LittleFET™ Power MOSFET
This Single N-Channel power MOSFET is manufactured
using an advanced MegaFET process. This process, which
uses feature sizes approaching those of LSI integrated
circuits, gives optimum utilization of silicon, resulting in
outstanding performance. It was designed for use in
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and low voltage bus
switches. This device can be operated directly from
integrated circuits.
Formerly developmental type TA49157.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RF1K49157
MS-012AA
RF1K49157
NOTE: When ordering, use the entire part number. For ordering in tape
and reel, add the suffix 96 to the part number, i.e., RF1K4915796.
Features
• 6.3A, 30V
• rDS(ON) = 0.030Ω
• Temperature Compensating PSPICE™ Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
NC (1)
DRAIN (8)
SOURCE (2)
DRAIN (7)
SOURCE (3)
GATE (4)
DRAIN (6)
DRAIN (5)
Packaging
JEDEC MS-012AA
BRANDING DASH
1
2
3
4
5
8-122
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
LittleFET™ is a trademark of Intersil Corporation. PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1 page  
RF1K49157
Typical Performance Curves (Continued)
2.0
ID = 250µA
1.5
1.0
0.5
0
-80 -40
0
40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
30
2500
2000
1500
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS = CDS + CGD
1000
COSS
500
CRSS
0
0 5 10 15 20 25
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10.0
22.5
VDD = BVDSS
7.5
RL = 4.76Ω
15 IG(REF) = 0.8mA 5.0
VGS = 10V
PLATEAU VOLTAGES IN
DESCENDING ORDER:
7.5 VDD = BVDSS
2.5
VDD = 0.75 BVDSS
VDD = 0.50 BVDSS
VDD = 0.25 BVDSS
00
20 I-I-GG-----((--AR----CE----FT----)) t, TIME (µs)
80 I-I-GG-----((--AR----CE----FT----))
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
8-126
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet RF1K49157.PDF ] | |
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