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PDF RFP25N05 Data sheet ( Hoja de datos )

Número de pieza RFP25N05
Descripción 25A/ 50V/ 0.047 Ohm/ N-Channel Power MOSFET
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
RFP25N05
July 1999 File Number 2112.4
25A, 50V, 0.047 Ohm, N-Channel Power
MOSFET
The RFP25N05 N-channel power MOSFET is manufactured
using the MegaFET process. This process which uses
feature sizes approaching those of LSI integrated circuits,
gives optimum utilization of silicon, resulting in outstanding
performance. It was designed for use in applications such as
switching regulators, switching converters, motor drivers,
and relay drivers. This transistor can be operated directly
from integrated circuits.
Formerly developmental type TA09771.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFP25N05
TO-220AB
RFP25N05
NOTE: When ordering use the entire part number.
Features
• 25A, 50V
• rDS(ON) = 0.047
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN
(FLANGE)
4-504
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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RFP25N05 pdf
RFP25N05
Typical Performance Curves (Continued)
1600
1200
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGS
50
37.5
VDD = BVDSS
VDD = BVDSS
10
7.5
800
400
0
0
COSS
CRSS
5 10 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
25
12.5
0
20 IG (REF)
IG (ACT)
0.75 BVDSS
0.50 BVDSS
0.25 BVDSS
RL = 2.0
IG(REF) = 0.75mA
VGS = 10V
t, TIME s)
80 IG (REF)
IG (ACT)
5.0
2.5
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
RL
+
RG
VDD
-
DUT
VGS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
4-508

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