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PDF RFD3055SM Data sheet ( Hoja de datos )

Número de pieza RFD3055SM
Descripción 12A/ 60V/ 0.150 Ohm/ N-Channel Power MOSFETs
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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Data Sheet
RFD3055, RFD3055SM, RFP3055
July 1999 File Number 3648.2
12A, 60V, 0.150 Ohm, N-Channel Power
MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA49082.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD3055
TO-251AA
FD3055
RFD3055SM
TO-252AA
FD3055
RFP3055
TO-220AB
FP3055
NOTE: When ordering, use the entire part number. Add the suffix 9A,
to obtain the TO-252AA variant in tape and reel, i.e. RFD3055SM9A.
Packaging
JEDEC TO-251AA
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
Features
• 12A, 60V
• rDS(ON) = 0.150
• Temperature Compensating PSPICE® Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
JEDEC TO-220AB
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
4-435
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

1 page




RFD3055SM pdf
RFD3055, RFD3055SM, RFP3055
Typical Performance Curves Unless Otherwise Specified (Continued)
600
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS CDS + CGD
400
CISS
200
0
0
COSS
CRSS
5 10 15 20
VDS, DRAIN TO SOURCE VOLTAGE (V)
25
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
60
VDD = BVDSS
45
VDD = BVDSS
10
7.5
30
0.75 BVDSS 0.75 BVDSS
0.50 BVDSS 0.50 BVDSS
15 0.25 BVDSS 0.25 BVDSS
RL = 5
IG(REF) = 0.24mA
VGS = 10V
0
IG(REF)
20
IG(ACT)
t, TIME (µs)
IG(REF)
80
IG(ACT)
5.0
2.5
0
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
Test Circuits and Waveforms
VDS
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
L
DUT
+
VDD
-
IAS
0.01
0
tP
IAS
BVDSS
VDS
VDD
tAV
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
RL
+
RG
VDD
-
DUT
VGS
FIGURE 16. SWITCHING TIME TEST CIRCUIT
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
4-439

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