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PDF TGF4250-EEU Data sheet ( Hoja de datos )
| Número de pieza | TGF4250-EEU | |
| Descripción | 4.8 mm Discrete HFET | |
| Fabricantes | TriQuint Semiconductor | |
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T R I Q U I N T S E M I C ON D U C TO R, I N C.
TGF4250-EEU
42504.8 mm Discrete HFET
q 4800 µm x 0.5 µm HFET
q Nominal Pout of 34- dBm at 8.5- GHz
q Nominal Gain of 8.5- dB at 8.5- GHz
q Nominal PAE of 53% at 8.5 - GHz
q Suitable for high reliability applications
q 0,572 x 1,334 x 0,102 mm (0.023 x 0.053 x 0.004 in.)
PHOTO ENLARGEMENT
DESCRIPTION
The TriQuint TGF4250-EEU is a single gate 4.8 mm discrete GaAs Heterostructure Field
Ef fect Transistor (HFET) designed for high ef ficiency power applications up to 10. 5- GHz in Class A and
Class AB operation. Typical performance at 2- GHz is 34 - dBm power output, 13 - dB gain, and 63% PAE.
Bond pad and backside metalization is gold plated for compat ibility with eutectic alloy attach
methods as well as thermocompr ession and thermosonic wire-bonding processes. The TGF4250-EEU
is readily assembled using automatic equipment.
TriQuint Semiconductor, Inc. • Texas Facilities • (972) 995-8465 • www.triquint.com
1 page  
TGF4250-EEU
RF AND DC
CHARACTERISTICS
LINEAR MODEL
Pout
GP
PAE
IDSS
GM
VP
BVGS
BVGD
PARAMETER
Output Power
Power Gain
Power Added Efficiency
Drain Saturation Current
Transconductance
Pinch Off Voltage
Breakdown Voltage Gate-Source
Breakdown Voltage Gate-Drain
MIN
NOMINAL
M AX
UNIT
33 34
- dBm
7 8.5
- dB
47 53
-%
816
1176
1536 mA
576 792 1008 mS
-2.7 -1.85
-1 V
-30 -22 -17 V
-30 -22 -17 V
Pout, Gain, and P AE: Measured at 8.5- GHz, drain voltage of 8.0 V . Gate voltage is adjusted to achieve
quiescent current of approximately 20% I DSS with no RF signal applied. The source is grounded. Input power
between 25 and 26- dBm.
IDSS: Saturated drain- source current. Sear ch for the maximum IDS at VGS = 0.0 V, and VDS swept between 0.5 V
to 3.5 V. Note that the drain voltage at which IDSS is located and r ecorded as VDSP.
GM: Transconductance. (IDSS - IDS1)/ I VG1 I. IDS1 measured at VG1 = - 0.25 V using the knee sear ch technique;
VDS swept between 0.5 V and VDSP to search for maximum IDS1.
VP: Pinch off voltage. VGS for IDS = 0.5 mA/mm of gate width. VDS fixed at 2.0 V, VGS swept to bring IDS to
0.5 mA/mm. Sweep will stop if VP current not found beyond 0.5 V of the minimum VP specification.
BVGS: Breakdown voltage, gate to source. IBD = 1.0 mA/mm of gate width. Source fixed at ground, drain not
connected (floating). When 1.0mA/mm drawn at gate, VGS measured as BVGS.
BVGD: Breakdown voltage, gate to drain. IBD = 1.0 mA/mm of gate width. Drain fixed at ground, source not
connected (floating). When 1.0 mA/mm drawn at the gate, VGD measured as BVGD.
CDG
RDG
LG RG
G
RI
RGS
CGS
VCCS
R1 R2
RS
LS
RD LD
D
RDS
CDS
VDS = 8.0 V and 30% IDSS at T = 25°C
FET Elements
LG = 0.010525 nH
RG = 0.21075
RGS = 20425
RI = 0.3025
CGS = 4.84 pF
CDG = 0.4015 pF
RDG = 51000
RS = 0.1
LS = 0.011 nH
RDS = 24.5025
CDS = 1.013 pF
RD = 0.165
LD = 0.0055 nH
VCCS Parameters
M = 531.6 mS
A=0
R1 = 1E19
R2 = 1E19
F=0
T = 5.49 pS
TriQuint Semiconductor, Inc. • Texas Facilities • (972) 995-8465 • www.triquint.com
5
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| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet TGF4250-EEU.PDF ] | |
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