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PDF TGF4230 Data sheet ( Hoja de datos )
| Número de pieza | TGF4230 | |
| Descripción | 1.2mm Discrete HFET | |
| Fabricantes | TriQuint Semiconductor | |
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T R I Q U I N T S E M I C ON D U C TO R, I N C.
TGF4230-EEU
423 01.2mmDiscrete HFET
q 1200 µm X 0.5 µm HFET
q Nominal Pout of 28.5- dBm at 8.5- GHz
q Nominal Gain of 10.0- dB at 8.5- GHz
q Nominal PAE of 55% at 8.5 - GHz
q Suitable for High-Reliability Applications
q 0,572 x 0,699 x 0,102 mm (0.023 x 0.028 x 0.004 in.)
PHOTO ENLARGEMENT
DESCRIPTION
The Triquint TGF4230 - EEU is a single gate 1.2 mm Discrete GaAs Heterostructure Field
Ef fect Transistor (HFET) designed for high- efficiency power applications up to 1 2- GHz in Class A and
Class AB operation.
Bond - pad and backside metalization is gold plated for compatibility with eutectic alloy attach methods
as well as thermocompression and thermosonic wire- bonding processes. The TGF4230-EEU is
readily assembled using automatic equipment.
TriQuint Semiconductor, Inc. • Texas Facilities • (972) 995-8465 • www.triquint.com
1 page  
TGF4230-EEU
RF AND DC
CHARACTERISTICS
LINEAR MODEL
Pout
GP
PAE
I DSS
GM
VP
BV G S
BV G D
PARAMETER
Output Power
Power Gain
Power Added Efficiency
Drain Saturation Current
Transconductance
Pinch Off Voltage
Breakdown Voltage Gate-Source
Breakdown Voltage Gate-Drain
MIN
27.5
8
50
204
144
-2.7
- 30
- 30
NOMINAL
28.5
10
55
294
198
-1.85
- 22
- 22
MAX UNIT
- dBm
- dB
-%
384 mA
252 mS
-1 V
-17 V
-17 V
Pout, Gain, and P AE: Measured at 8.5 GHz, drain voltage of 8.0 V . Gate voltage is adjusted to achieve
quiescent current of approximately 20% IDSS with no RF signal applied. The source is gr ounded. Input power
between 18 and 19-dBm.
IDSS: Saturated drain-source current. Sear ch for the maximum IDS at VGS = 0.0 V, and VDS swept between 0.5 V
to 3.5 V. Note that the drain voltage at which I DSS is located and r ecorded as VDSP.
GM: Transconductance. (I DSS - I DS1)/ I VG1 I. I DS1 measured at VG1 = -0.25 V using the knee search
technique; VDS swept between 0.5 V and VDSP to search for maximum I DS1.
VP: Pinch off voltage. VGS for I DS = 0.5 mA/mm of gate width. V DS fixed at 2.0 V, VGS swept to bring IDS to
0.5 mA/mm. Sweep will stop if V P current not found beyond 0.5 V of the minimum V Pspecification.
BVGS: Breakdown voltage, gate to source. I BD = 1.0 mA/mm of gate width. Source fixed at ground, drain not
connected (floating). When 1.0mA/mm drawn at gate, V GS measured as B VGS.
BVGD: Breakdown voltage, gate to drain. IBD = 1.0 mA/mm of gate width. Drain fixed at gr ound, source not
connected (floating). When 1.0 mA/mm drawn at the gate, V GD measured as B VGD.
CDG
RDG
LG RG
G
RI
RGS
CGS
VCCS
R1 R2
RS
LS
RD LD
D
RDS
CDS
VDS = 8.0 V and 30% IDSS at T = 25°C
FET Elements
L G = 0.0421 nH
RG = 0.43
RGS = 81700
R I = 1.21
CGS = 1.21 pF
CDG = 0.1004 pF
RDG = 204000
RS = 0.4
LS = 0.015 nH
RDS = 98.01
CDS = 0.25325 pF
RD = 0.66
LD = 0.022 nH
VCCS Parameters
M = 132.9 mS
A=0
R1 = 1E19
R2 = 1E19
F=0
T = 5.49 pS
TriQuint Semiconductor, Inc. • Texas Facilities • (972) 995-8465 • www.triquint.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet TGF4230.PDF ] | |
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