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PDF TDK5110 Data sheet ( Hoja de datos )

Número de pieza TDK5110
Descripción ASK/FSK Transmitter 868/433 MHz
Fabricantes Infineon Technologies AG 
Logotipo Infineon Technologies AG Logotipo



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No Preview Available ! TDK5110 Hoja de datos, Descripción, Manual

Wireless Components
ASK/FSK Transmitter 868/433 MHz
TDK 5110 Version 1.1
Specification October 2002
Preliminary

1 page




TDK5110 pdf
TDK 5110
Product Description
2.1 Overview
The TDA5110 is a single chip ASK/FSK transmitter for the frequency bands
868-870 MHz and 433-435 MHz. The IC offers a high level of integration and
needs only a few external components. The device contains a fully integrated
PLL synthesizer and a high efficiency power amplifier to drive a loop antenna.
A special circuit design and an unique power amplifier design are used to save
current consumption and therefore to save battery life. Additional features like
a power down mode, a low power detect, a selectable crystal oscillator fre-
quency and a divided clock output are implemented. The IC can be used for
both ASK and FSK modulation.
2.2 Applications
s Keyless entry systems
s Remote control systems
s Alarm systems
s Communication systems
2.3 Features
s fully integrated frequency synthesizer
s VCO without external components
s high efficiency power amplifier typ. 10 dBm @ 3 V
s switchable frequency range 868-870/433-435 MHz
s ASK/FSK modulation
s low supply current typ. 13 mA @ 3 V
s voltage supply range 2.1 - 4 V
s power down mode
s low voltage sensor
s selectable crystal oscillator 6.78 MHz/13.56 MHz
s programmable divided clock output for µC
s low external component count
Wireless Components
2-2
Specification, October 2002

5 Page





TDK5110 arduino
TDK 5110
Functional Description
8 CLKOUT
300
8
Clock output to supply an external device.
An external pull-up resistor has to be added
in accordance to the driving requirements of
the external device.
A clock frequency of 3.39 MHz is selected
by a logic low at CLKDIV input (pin 9).
A clock frequency of 847.5 kHz is selected
by a logic high at CLKDIV input (pin 9).
9 CLKDIV
This pin is used to select the desired clock
+1.2 V
VS
division rate for the CLKOUT signal.
A logic low (CLKDIV < 0.2 V) applied to this
pin selects the 3.39 MHz output signal at
5 µA CLKOUT (pin 8).
60 k
9
60 k
A logic high (CLKDIV open) applied to this
pin selects the 847.5 kHz output signal at
+0.8 V CLKOUT (pin 8).
10 COSC
VS
6 k
10
This pin is connected to the reference oscil-
lator circuit.
The reference oscillator is working as a neg-
ative impedance converter. It presents a
negative resistance in series to an induc-
tance at the COSC pin.
100 µA
11 FSKOUT
12 FSKGND
VS
200 µA
1.5 k
11
12
This pin is connected to a switch to
FSKGND (pin 12).
The switch is closed when the signal at
FSKDTA (pin 7) is in a logic low state.
The switch is open when the signal at
FSKDTA (pin 7) is in a logic high state.
FSKOUT can switch an additional capacitor
to the reference crystal network to pull the
crystal frequency by an amount resulting in
the desired FSK frequency shift of the trans-
mitter output frequency.
Ground connection for FSK modulation out-
put FSKOUT.
Wireless Components
3-5
Specification, October 2002

11 Page







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