PDF TDA9853H Data sheet ( Hoja de datos )

Número de pieza	TDA9853H
Descripción	I2C-bus controlled economic BTSC stereo decoder and audio processor
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA9853H I2C-bus controlled economic BTSC stereo decoder and audio processor Product speciﬁcation File under Integrated Circuits, IC02 2000 Dec 11 1 page Philips Semiconductors I2C-bus controlled economic BTSC stereo decoder and audio processor Product speciﬁcation TDA9853H Component list Electrolytic capacitors ±20%; foil capacitors ±10%; resistors ±5%; unless otherwise speciﬁed; see Fig.1. COMPONENT C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 R1 R2 R3 R4 Q1 2.2 µF 220 nF 2.2 µF 220 nF 2.2 µF 2.2 µF 2.2 µF 4.7 µF 2.2 µF 3.3 nF 150 pF 56 nF 56 nF 150 pF 3.3 nF 2.2 µF 2.2 µF 100 µF 100 µF 10 µF 1 µF 4.7 nF 22 nF 3.3 kΩ 15 kΩ 1.3 kΩ 100 kΩ VALUE TYPE electrolytic foil electrolytic foil electrolytic electrolytic electrolytic electrolytic electrolytic foil foil foil foil foil foil electrolytic electrolytic electrolytic electrolytic electrolytic electrolytic foil foil CSB503F58 CSB503JF958 63 V REMARK 63 V 63 V 63 V 63 V 63 V ±10% 63 V 63 V 63 V 16 V 16 V 63 V 63 V radial leads alternative as SMD 2000 Dec 11 5 5 Page Philips Semiconductors I2C-bus controlled economic BTSC stereo decoder and audio processor Product speciﬁcation TDA9853H SYMBOL PARAMETER CONDITIONS MIN. TYP. VCA Is Relrate nominal timing current for nominal release rate of VCA detector nominal detector release rate Is can be measured at pin TW via current meter connected to 0.5VCC + 1 V nominal timing current and external capacitor values 6.5 − 8 125 Automatic volume level control Gv Gstep Vi(rms) Vo(AVL)(rms) Voffset(DC) Ratt Idec voltage gain maximum boost; note 3 5 maximum attenuation; note 3 14 equivalent step width between the input stages (soft switching system) − input voltage (RMS value) maximum boost; note 3 − maximum attenuation; note 3 − output voltage in AVL operation (RMS value) 160 DC offset voltage between different gain steps voltage at pin CAV 6 to 5.83 V or 5.83 to 5.61 V or 5.61 to 4.83 V or 4.83 to 2.1 V; note 4 − discharge resistors for attack AT1 = 0; AT2 = 0; note 5 time constant AT1 = 1; AT2 = 0; note 5 340 590 AT1 = 0; AT2 = 1; note 5 0.96 AT1 = 1; AT2 = 1; note 5 1.7 charge current for decay time normal mode; CCD = 0; note 6 1.6 Power-on speed-up; CCD = 1; − note 6 6 15 1.5 0.1 1.125 200 − 420 730 1.2 2.1 2 30 Selector internal and external Zi input impedance αs input isolation of one selected source to the other input Vi(max)(rms) maximum input voltage (RMS value) Gv voltage gain, selector Line output; pins LOL and LOR Vo(rms) HRo Zo VO RL CL nominal output voltage (RMS value) output headroom output impedance DC output voltage output load resistance output load capacitance Vi = 1 V; fi = 1 kHz Vi = 1 V; fi = 12.5 kHz THD < 0.5% 100% modulation 16 20 70 76 70 76 −2 −0 − 500 9− − 80 0.45VCC 0.5VCC 5− −− MAX. UNIT 9.5 µA − dB/s 7 dB 16 dB − dB −V −V 250 mV 20 mV 520 Ω 910 Ω 1.5 kΩ 2.6 kΩ 2.4 µA − µA 25 kΩ − dB − dB −V − dB − mV − dB 120 Ω 0.55VCC V − kΩ 2.5 nF 2000 Dec 11 11 11 Page

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