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PDF TDA9845 Data sheet ( Hoja de datos )

Número de pieza TDA9845
Descripción TV and VTR stereo/dual sound processor with digital identification
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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INTEGRATED CIRCUITS
DATA SHEET
TDA9845
TV and VTR stereo/dual sound
processor with digital identification
Preliminary specification
Supersedes data of January 1993
File under Integrated Circuits, IC02
1995 Mar 20
Philips Semiconductors

1 page




TDA9845 pdf
Philips Semiconductors
TV and VTR stereo/dual sound processor
with digital identification
PINNING
SYMBOL
C1
C2
CAGC
CLP
CDCL
Vi pil
Cref
Vi 1
Vi 2
Vi 3
Vo 2
Vo 1
CD1
LEDDU
LEDST
GND
CD2
VP
XTAL
C3
PIN DESCRIPTION
1 control input Port C1
2 control input Port C2
3 AGC capacitor of pilot frequency amplifier
4 identification low-pass capacitor
5 DC loop capacitor
6 pilot frequency input voltage
7 capacitor of reference voltage (12VP)
8 AF input signal voltage 1 (from sound carrier 1 or
AM sound (standard L)
9 AF input signal voltage 2 (from sound carrier 2)
10 AF input signal voltage 3 (Mono sound)
11 AF output signal voltage 2 (Main)
12 AF output signal voltage 1 (Main)
13 50 µs de-emphasis capacitor of AF Channel 1
14 LED (dual)
15 LED (stereo)
16 ground (0 V)
17 50 µs de-emphasis capacitor of AF Channel 2
18 supply voltage (+5 to +8 V)
19 10 MHz crystal input
20 control input Port C3
Preliminary specification
TDA9845
lfpage
C1 1
20 C3
C2 2
19 XTAL
CAGC 3
18 VP
CLP 4
17 CD2
CDCL 5
Vi pil 6
16 GND
TDA9845
15 LEDST
Cref 7
14 LEDDU
Vi 1 8
13 CD1
Vi 2 9
12 Vo 1
Vi 3 10
11 Vo 2
MED646
Fig.3 Pin configuration.
1995 Mar 20
5

5 Page





TDA9845 arduino
Philips Semiconductors
TV and VTR stereo/dual sound processor
with digital identification
Preliminary specification
TDA9845
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
tdet
fident
tintegr
tident(on)
tident(off)
pull-in time of identification
PLL (referenced to
fdet STEREO = 117.48 Hz and
fdet DUAL = 274.12 Hz)
identification window
frequency width (referenced
to fdet STEREO = 117.48 Hz
and fdet DUAL = 274.12 Hz)
integrator time constant
total identification time on
total identification time off
STEREO
DUAL
STEREO; note 6
DUAL; note 6
STEREO; note 7
DUAL; note 7
STEREO; note 8
DUAL; note 8
0
0
2.2
2.3
0.94
0.35
0.35
0.60
0.60
0.8 s
0.8 s
2.2 Hz
2.3 Hz
0.94 s
2.0 s
2.0 s
1.5 s
1.5 s
LED (pins 14 and 15)
VL(off)
VL(on)
IL(off)
IL(on)
output voltage
output voltage
input current
input current
LED off
LED on
LED off
LED on
− − 8.8 V
− − 0.7 V
− − 1 µA
− − 12 mA
Control input ports C1, C2 and C3 (pins 1, 2 and 20)
VCL LOW level input voltage
VCH HIGH level input voltage
ICL LOW level input current
ICH HIGH level input current
0
2.4
−−
−−
0.8 V
8.8 V
1 µA
1 µA
Notes
1. Vo = 0.5 V RMS value; f = 1 kHz.
2. Without de-emphasis capacitors with respect to nominal gain.
3. In dual mode: A (B)-signal into B (A) channel.
In stereo mode: R-signal into left channel; L-signal = 0.
4. Tuner input signal, measured with PCALH reference front end (12EMF, 75 , 2T/20T/white bar, 100% video) and
PC/SC1 = 13 dB; PC/SC2 = 20 dB. The pilot band-pass has to be aligned.
5. Bandwidth of the pilot BP-filter B3 dB = 1.2 kHz. Vi 2 input driven with identification-modulated pilot carrier and white
noise.
6. Identification window is defined as twice the pull-in frequency range (lower plus upper side) of identification PLL
(steady detection) plus window increase due to integrator (fluctuating detection).
7. The maximum total system identification time ON is equal to tident(on) plus tacqui AGC.
8. The maximum total system identification time OFF is equal to tident(off).
1995 Mar 20
11

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