PDF TDA9815 Data sheet ( Hoja de datos )

Número de pieza	TDA9815
Descripción	Multistandard/MAC VIF-PLL with QSS-IF and dual FM-PLL/AM demodulator
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA9815 Multistandard/MAC VIF-PLL with QSS-IF and dual FM-PLL/AM demodulator Product speciﬁcation Supersedes data of 1995 Oct 03 File under Integrated Circuits, IC02 1998 Feb 11 1 page Philips Semiconductors Multistandard/MAC VIF-PLL with QSS-IF and dual FM-PLL/AM demodulator Product speciﬁcation TDA9815 PINNING SYMBOL PIN DESCRIPTION Vi VIF1 Vi VIF2 CBL/MAC Vi VIF3 Vi VIF4 TADJ 1 VIF differential input signal voltage 1 2 VIF differential input signal voltage 2 3 black level detector/MAC capacitor 4 VIF differential input signal voltage 3 5 VIF differential input signal voltage 4 6 tuner AGC takeover adjust (TOP) TPLL CSAGC STD 7 PLL loop ﬁlter 8 SIF AGC capacitor 9 standard switch Vo CVBS FMLSWI 10 CVBS output signal voltage 11 FM input select and L/L accent switch Vo AF1 Vo AF2 CDEC2 CDEC1 Vi FM2 Vi FM1 Vi FM3 TAGC 12 audio voltage frequency output 1 13 audio voltage frequency output 2 14 decoupling capacitor 2 15 decoupling capacitor 1 16 sound intercarrier input voltage 2 17 sound intercarrier input voltage 1 18 sound intercarrier input voltage 3 19 tuner AGC output Vo QSS Vo(vid) Vi(vid) AFC 20 single reference QSS output voltage 21 composite video output voltage 22 video buffer input voltage 23 AFC output VCO1 VCO2 Cref GND 24 VCO1 reference circuit for 2fPC 25 VCO2 reference circuit for 2fPC 26 1⁄2VP reference capacitor 27 ground CVAGC VP INSWI 28 VIF-AGC capacitor 29 supply voltage 30 VIF input switch Vi SIF1 Vi SIF2 31 SIF differential input signal voltage 1 32 SIF differential input signal voltage 2 handbook, halfpage Vi VIF1 1 Vi VIF2 2 CBL/MAC 3 Vi VIF3 4 Vi VIF4 5 32 Vi SIF2 31 Vi SIF1 30 INSWI 29 VP 28 C VAGC TADJ 6 27 GND TPLL 7 CSAGC 8 STD 9 26 Cref 25 VCO2 TDA9815 24 VCO1 Vo CVBS 10 FMLSWI 11 Vo AF1 12 Vo AF2 13 CDEC2 14 CDEC1 15 Vi FM2 16 23 AFC 22 Vi(vid) 21 Vo(vid) 20 Vo QSS 19 TAGC 18 Vi FM3 17 Vi FM1 MED680 Fig.2 Pin configuration. 1998 Feb 11 5 5 Page Philips Semiconductors Multistandard/MAC VIF-PLL with QSS-IF and dual FM-PLL/AM demodulator Product speciﬁcation TDA9815 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V10(cll) Ro,10 Iint 10 Io,10 max(sink) Io,10 max(source) B−1 B−3 lower video clipping voltage level output resistance DC internal bias current for emitter-follower maximum AC and DC output sink current maximum AC and DC output source current −1 dB video bandwidth −3 dB video bandwidth note 2 B/G and L standard; CL < 20 pF; RL > 1 kΩ; AC load B/G and L standard; CL < 20 pF; RL > 1 kΩ; AC load − 1.0 1.1 − − 10 2.0 2.5 − 1.4 − − 2.4 − − 8.4 11 − 11 14 − V Ω mA mA mA MHz MHz Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off) Vo CVBS(p-p) Vo CVBS(sync) Vo CVBS(peak) ∆Vo ∆Vo(blB/G) ∆Vo(blL) Gdiff ϕdiff B−1 B−3 S/N (W) S/N CVBS output signal voltage on pin 10 (peak-to-peak value) sync voltage level peak voltage level deviation of CVBS output signal voltage at B/G black level tilt in B/G standard black level tilt for worst case in L standard differential gain differential phase −1 dB video bandwidth −3 dB video bandwidth weighted signal-to-noise ratio unweighted signal-to-noise ratio note 9 B/G standard L standard MAC standard 50 dB gain control 30 dB gain control gain variation; note 10 picture carrier modulated by test line (VITS) only; gain variation; note 10 “CCIR, line 330” “CCIR, line 330” CL < 20 pF; RL > 1 kΩ; AC load B/G and L standard MAC standard CL < 20 pF; RL > 1 kΩ; AC load B/G and L standard MAC standard see Fig.5 and note 11 see Fig.5 and note 11 1.7 − − − − − − − − − 5 8.4 7 11 56 49 2.0 2.3 1.35 − 1.35 − 1.35 − − 0.5 − 0.1 −1 − 1.9 25 12 6− 11 − 8− 14 − 60 − 53 − V V V V dB dB % % % deg MHz MHz MHz MHz dB dB 1998 Feb 11 11 11 Page

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