PDF TDA9806 Data sheet ( Hoja de datos )

Número de pieza	TDA9806
Descripción	Multistandard VIF-PLL and FM-PLL demodulator
Fabricantes	NXP Semiconductors
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No Preview Available ! INTEGRATED CIRCUITS DATA SHEET TDA9806 Multistandard VIF-PLL and FM-PLL demodulator Preliminary speciﬁcation File under Integrated Circuits, IC02 1995 Sep 05 1 page Philips Semiconductors Multistandard VIF-PLL and FM-PLL demodulator Preliminary speciﬁcation TDA9806 PINNING SYMBOL PIN DESCRIPTION Vi VIF1 Vi VIF2 n.c. 1 VIF differential input signal voltage 1 2 VIF differential input signal voltage 2 3 not connected n.c. 4 not connected n.c. 5 not connected TADJ 6 tuner AGC takeover adjust (TOP) TPLL n.c. 7 PLL loop ﬁlter 8 not connected n.c. 9 not connected Vo CVBS n.c. 10 CVBS output signal voltage 11 not connected Vo AF DEEMI DEEMO CDEC n.c. 12 audio voltage frequency output 13 de-emphasis input 14 de-emphasis output 15 decoupling capacitor 16 not connected Vi FM n.c. 17 sound intercarrier input voltage 18 not connected TAGC 19 tuner AGC output Vo(int) Vo(vid) Vi(vid) AFC 20 sound intercarrier output voltage 21 composite video output voltage 22 video buffer input voltage 23 AFC output VCO1 VCO2 Cref GND 24 VCO1 reference circuit for 2fPC 25 VCO2 reference circuit for 2fPC 26 1⁄2VP reference capacitor 27 ground CVAGC VP n.c. 28 VIF AGC capacitor 29 supply voltage 30 not connected n.c. 31 not connected n.c. 32 not connected handbook, halfpage Vi VIF1 1 Vi VIF2 2 n.c. 3 32 n.c. 31 n.c. 30 n.c. n.c. 4 n.c. 5 29 VP 28 C VAGC TADJ 6 27 GND TPLL 7 26 Cref n.c. 8 n.c. 9 TDA9806 25 VCO2 24 VCO1 Vo CVBS 10 n.c. 11 Vo AF 12 DEEM I 13 DEEM O 14 23 AFC 22 Vi(vid) 21 Vo(vid) 20 Vo(int) 19 TAGC C DEC 15 n.c. 16 18 n.c. 17 Vi FM MHA053 Fig.2 Pin configuration. 1995 Sep 05 5 5 Page Philips Semiconductors Multistandard VIF-PLL and FM-PLL demodulator Preliminary speciﬁcation TDA9806 SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Measurements from IF input to CVBS output (pin 10; 330 Ω between pins 21 and 22, sound carrier off) Vo CVBS(p-p) CVBS output signal voltage note 9 on pin 10 (peak-to-peak value) 1.7 2.0 2.3 V Vo CVBS(sync) ∆Vo sync voltage level deviation of CVBS output signal voltage at B/G B/G standard 50 dB gain control 30 dB gain control − 1.35 − V − − 0.5 dB − − 0.1 dB ∆Vo(blBG) Gdiff ϕdiff B−1 B−3 S/N (W) black level tilt in B/G standard differential gain differential phase −1 dB video bandwidth −3 dB video bandwidth weighted signal-to-noise ratio gain variation; note 10 “CCIR, line 330” “CCIR, line 330” B/G standard; CL < 20 pF; RL > 1 kΩ; AC load B/G standard; CL < 20 pF; RL > 1 kΩ; AC load see Fig.4 and note 11 − − − 5 7 56 −1 25 12 6− 8− 60 − % % deg MHz MHz dB S/N unweighted signal-to-noise see Fig.4 and note 11 49 53 − dB ratio IMα1.1 intermodulation attenuation at f = 1.1 MHz; ‘blue’ see Fig.5 and note 12 58 64 − dB intermodulation attenuation at f = 1.1 MHz; ‘yellow’ see Fig.5 and note 12 60 66 − dB IMα3.3 intermodulation attenuation at f = 3.3 MHz; ‘blue’ see Fig.5 and note 12 58 64 − dB intermodulation attenuation at f = 3.3 MHz; ‘yellow’ see Fig.5 and note 12 59 65 − dB αc(rms) residual vision carrier (RMS value) B/G standard; fundamental − wave and harmonics 2 5 mV αH(sup) suppression of video signal harmonics note 8a 35 40 − dB αH(spur) PSRR spurious elements note 8b power supply ripple rejection at video signal; grey level; pin 10 B/G standard; see Fig.8 40 25 −− 28 − dB dB VIF-AFC detector (pin 28) I28 charging current B/G standard; note 10 discharging current B/G standard tresp AGC response to an increasing VIF step B/G standard; note 13 AGC response to a decreasing B/G standard VIF step 0.75 1 1.25 mA 15 20 25 µA − 0.05 0.1 ms/dB − 2.2 3.5 ms/dB 1995 Sep 05 11 11 Page

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