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PDF TDA9144 Data sheet ( Hoja de datos )
| Número de pieza | TDA9144 | |
| Descripción | I2C-bus controlled/ alignment-free PAL/NTSC/SECAM decoder/sync processor with PALplus helper demodulator | |
| Fabricantes | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TDA9144
I2C-bus controlled, alignment-free
PAL/NTSC/SECAM decoder/sync
processor with PALplus helper
demodulator
Preliminary specification
File under Integrated Circuits, IC02
1996 Jan 17
1 page  
Philips Semiconductors
I2C-bus controlled, alignment-free PAL/NTSC/SECAM
decoder/sync processor with PALplus helper demodulator
Preliminary specification
TDA9144
PINNING
SYMBOL
−(R−Y)
−(B−Y)
Uin
Vin
SCL
SDA
VCC
DEC
DGND
SC
VA
Yout
Vout
Uout
I/O PORT
O PORT/LLC
CLP/HA
F
B
G
R
ADDR (CVBS)
Fscomb
HPLL
C
Y/CVBS
AGND
FILTref
CPLL
XTAL
XTAL2
SECref
PIN DESCRIPTION
1 output signal for −(R−Y)
2 output signal for −(B−Y)
3 chrominance U input
4 chrominance V input
5 serial clock input
6 serial data input/output
7 positive supply voltage
8 digital supply decoupling
9 digital ground
10 sandcastle output
11 vertical acquisition
synchronization pulse
12 luminance output
13 chrominance V output
14 chrominance U output
15 input/output port
16 output port/line-locked clock
output
17 clamping pulse/HA
synchronization pulse
input/output
18 fast switch select input
19 BLUE input
20 GREEN input
21 RED input
22 I2C-bus address input (CVBS
output)
23 comb filter status input/output
24 horizontal PLL filter
25 chrominance input
26 luminance/CVBS input
27 analog ground
28 filter reference decoupling
29 colour PLL filter
30 reference crystal input
31 second crystal input
32 SECAM reference decoupling
handbook, halfpage
−(R−Y) 1
−(B−Y) 2
32 SECref
31 XTAL2
Uin 3
Vin 4
SCL 5
SDA 6
30 XTAL
29 CPLL
28 FILTref
27 AGND
VCC 7
DEC 8
DGND 9
26 Y/CVBS
25 C
TDA9144
24 HPLL
SC 10
23 Fscomb
VA 11
22 ADDR (CVBS)
Yout 12
Vout 13
Uout 14
I/O PORT 15
21 R
20 G
19 B
18 F
O PORT/LLC 16
17 CLP/HA
MBG896
Fig.2 Pin configuration.
1996 Jan 17
5
5 Page 
Table 2 PALplus modes for 50 Hz
MODE MACP HD
1 00
2 10
3 11
4 01
5 XX
6 XX
7 XX
NRM
1
1
1
1
0
1
1
FBA
0
0
0
0
X
1
X
PAL
1
1
1
1
X
X
0
4.43
TRAP
TB(3)
bypass
bypass(6)
TB(7)
TB(3)
TB(3)
TB(3)
COMB
ENABLE
LUMA
DELAY AMPL
LINE (b-w)
(V)
ECMB BPS
1
disabled BPS 0.8
disabled bypass 0.8
disabled(8) bypass 0.8
ECMB BPS
1
ECMB BPS
1
ECMB BPS
1
BLACK
SET-UP(1)
(mV)
HELPER
SET-UP(2)
(mV)
HELPER
LINES
0 0 luma(4)
200 0 luma(4)
200 400 helper(4)
200 400 helper(4)
0 0 luma
0 0 luma(4)
0 0 luma(4)
LINE
22
LINE
23b
LINE
623a
black black black
set-up helper(5) luma
set-up helper luma
set-up helper luma
black black luma(9)
black black black
black black black
Notes
1. When activated, the black set-up is added to the full frame.
2. When activated, the helper set-up is added to line 22b, 23b, 24 to 59, 275 to 310, 336 to 371, 587 to 622.
3. The 4.43 MHz trap is active in CVBS input mode and TB = 0, otherwise the trap is bypassed.
4. When helper blanking is active (see Table 1) lines 24 to 59, 275 to 310, 336 to 371, 587 to 622 are blanked.
5. Demodulated helper with 400 mV set-up and 4.43 MHz trap active.
6. The 4.43 MHz trap is bypassed during the letter box lines, but activated during helper lines and line 23b to reduce 4.43 MHz rest carrier.
7. The 4.43 MHz trap is active during helper lines and line 23b, during the letter box lines the trap is active when TB = 0.
8. In principle the comb filter should be enabled during letter box lines, when ECMB = 1. It depends on the comb filter if this will be implemented.
9. Line 623a contains luminance in NO_NORM, line 623a is black in a NEAR_NORM sync condition.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TDA9144.PDF ] | |
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