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PDF TDA9109N Data sheet ( Hoja de datos )
| Número de pieza | TDA9109N | |
| Descripción | LOW-COST DEFLECTION PROCESSOR FOR MULTISYNC MONITORS | |
| Fabricantes | ST Microelectronics | |
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TDA9109/N
LOW-COST DEFLECTION PROCESSOR
FOR MULTISYNC MONITORS
.....HORIZONTAL
SELF-ADAPTATIVE
DUAL PLL CONCEPT
150kHz MAXIMUM FREQUENCY
X-RAY PROTECTION INPUT
I2C CONTROLS : H-POSITION, FREQUENCY
GENERATOR FOR BURN-IN MODE
VERTICAL
. VERTICAL RAMP GENERATOR
. 50 TO 165Hz AGC LOOP
. GEOMETRY TRACKING WITH VPOS & VAMP
. I2C CONTROLS :
VAMP, VPOS, S-CORR, C-CORR
. DC BREATHING COMPENSATION
I2C GEOMETRY CORRECTIONS
. VERTICAL PARABOLA GENERATOR
(Pincushion, Keystone)
. HORIZONTAL DYNAMIC PHASE
(Side Pin Balance & Parallelogram)
. HORIZONTAL AND VERTICAL DYNAMIC FO-
CUS (Horizontal Focus Amplitude, Horizontal
Focus Symmetry, Vertical Focus Amplitude)
.......GENERAL
SYNC PROCESSOR
12V SUPPLY VOLTAGE
8V REFERENCE VOLTAGE
HOR. & VERT. LOCK/UNLOCK OUTPUTS
READ/WRITE I2C INTERFACE
VERTICAL MOIRE
B+ REGULATOR
- INTERNAL PWM GENERATOR FOR B+
CURRENT MODE STEP-UP CONVERTER
- S WI TCHABL E TO STEP-DOWN CON-
VERTER
- I2C ADJUSTABLEB+ REFERENCE VOLTAGE
- OUTPUT PULSES SYNCHRONIZED ON
. HORIZONTAL FREQUENCY
- INTERNAL MAX. CURRENT LIMITATION
COMPARED WITH THE TDA9109,
THE TDA9109/N HAS :
- NO I2C FREE RUNNING FREQUENCY AD-
JUSTMENT
- FIXED HORIZONTAL DUTY CYCLE (48%)
- INCREASED MAX. STORAGE TIME OF THE
HORIZONTAL SCANNING TRANSISTOR
DESCRIPTION
The TDA9109/N is a monolithic integrated circuit
assembledin 32-pin shrink dual in line plastic pack-
age. This IC controls all the functions related to the
horizontal and vertical deflection in multimode or
multi-frequency computer display monitors.
The internal sync processor, combined with the
very powerful geometry correction block make the
TDA9109/N suitable for very high performance
monitors, using very few external components.
The horizontaljitter level is very low. It is particularly
well suited for high-end 15” and 17” monitors.
Combined with the ST7275 Microcontroller family,
TDA9206 (Video preamplifier) and STV942x (On-
Screen Display controller) the TDA9109/N allows
fully I2C bus controlled computer display monitors
to be built with a reduced number of external
comp onen ts.
SHRINK32
(Plastic Package)
ORDER CODE : TDA9109/N
June 1998
1/32
1 page  
BLOCK DIAGRAM
HOUT
PLL2C
HFLY
C0
R0
HLOCKOUT
HPOSITION
PLL1F
TDA9109/N
EWOUT
VOUT
BREATH
VAGCCAP
VCAP
5/32
5 Page 
TDA9109/N
B+ SECTION
Operating Conditions
Symbol
Parameter
FeedRes Minimum Feedback Resistor
Test conditions
Resistor between Pins 15 and 14
Min. Typ. Max. Unit
5 kΩ
Electrical Characteristics (VCC = 12V, Tamb = 25oC)
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
OLG Error Amplifier Open Loop Gain At low frequency (see Note 16)
85 dB
UGBW Unity Gain Bandwidth
(see Note 16)
6 MHz
IRI
EAOI
Regulation Input Bias Current
Error Amplifier Output Current
Current sourced by Pin 15 (PNP base)
Current sourced by Pin 14
Current sunk by Pin 14
0.2 µA
0.5 mA
2 mA
CSG Current Sense Input Voltage Gain Pin 16
3
MCEth Max Current Sense Input Threshold Pin 16
Voltage
1.2 V
ISI
Tonmax
B+OSV
IVREF
Current Sense Input Bias Current Current sunk by Pin 16 (NPN base)
Maximum ON Time of the external
power transistor
B+ Output Saturation Voltage
Internal Reference Voltage
% of Horizontal period,
f0 = 27kHz (see Note 17)
V28 with I28 = 10mA
On erroramp (+) input for Subaddress 0B
Byte 1000000
1
100
0.25
4.8
µA
%
V
V
VREFADJ I nt e rna l R ef er en ce V ol t ag e Byte 1111111
Adjustment Range
Byte 0000000
+20 %
-20 %
PWMSEL Threshold for step-up/step-down
selection
Pin 16
6V
tFB+ Fall Time
Pin 28
100 ns
Notes : 16. These parameters are not tested on each unit. They are measured during our internal qualification procedure which includes
characterization on batches coming from corners of our processes and also temperature characterization.
17. The external power transistor is OFF during 400ns of the HFOCUSCAP discharge.
Figure 1 : Vertical Dynamic Focus Function
Figure 2 : E/W Output
VDFAMP
B
A
HDFDC
Figure 3 : Dynamic Horizontal Phase Control
Output
B
EWPARA
A
EWDC
Figure 4 : Keystone Effect on E/W Output
(PCC Inhibited)
B
A
SPBPARA
DHPCDC
Keyadj
11/32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TDA9109N.PDF ] | |
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