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PDF TDA9109A Data sheet ( Hoja de datos )

Número de pieza TDA9109A
Descripción LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR
Fabricantes ST Microelectronics 
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TDA9109A
LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR
FOR MULTISYNC MONITOR
FEATURES
General
s SYNC PROCESSOR
s 12V SUPPLY VOLTAGE
s 8V REFERENCE VOLTAGE
s HORIZONTAL LOCK/UNLOCK OUTPUT
s READ/WRITE I2C INTERFACE
s VERTICAL MOIRE
s B+ REGULATOR
- Internal PWM generator for B+ current mode
step-up converter
- Switchable to step-down converter
- I2C adjustable B+ reference voltage
- Output Pulses Synchronized on Horizontal
Frequency
- Internal Maximum Current Limitation
Horizontal
s Self-adaptative
s Dual PLL concept
s 150kHz maximum frequency
s X-ray protection input
s I2C controls:
Horizontal duty-cycle, H-position
Vertical
s Vertical ramp generator
s 50 to 185Hz AGC loop
s Geometry tracking with Vpos & Vamp
s I2C controls:
Vamp, Vpos, S-corr, C-corr
s DC breathing compensation
I2C Geometry corrections
s Vertical parabola generator
(Pin Cushion - E/W, Keystone, Corner
Correction)
s Horizontal dynamic phase
(Side Pin Balance & Parallelogram)
s Horizontal and vertical dynamic focus
(Horizontal focus amplitude, Horizontal focus
symmetry, Vertical focus amplitude)
June 2000
DESCRIPTION
The TDA9109A is a monolithic integrated circuit
assembled in a 32-pin shrink dual in line plastic
package. This IC controls all the functions related
to the horizontal and vertical deflection in multi-
mode or multi-frequency computer display moni-
tors.
The internal sync processor, combined with the
very powerful geometry correction block, make
the TDA9109A suitable for very high performance
monitors, using very few external components.
The horizontal jitter level is very low. It is particu-
larly well-suited to high-end 15” and 17” monitors.
Combined with the ST7275 Microcontroller family,
TDA9206 (Video preamplifier) and STV942x (On-
Screen Display controller), the TDA9109A allows
fully I2C bus-controlled computer display monitors
to be built with a reduced number of external com-
ponents
.
SHRINK32 (Plastic Package)
ORDER CODE: TDA9109A
Version 4.2
1/47
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TDA9109A pdf
TDA9109A
PIN CONNECTIONS
Pin Name
Func tion
1 H/HVIN
TTL compatible Horizontal sync Input (separate or composite)
2 VSYNCIN
TTL compatible Vertical sync Input (for separated H&V)
3 HLOCKOUT First PLL Lock/Unlock Output (0 V: Unlocked - 5 V: Locked)
4 PLL2C
Second PLL Loop Filter
5 C0
Horizontal Oscillator Capacitor
6 R0
Horizontal Oscillator Resistor
7 PLL1F
First PLL Loop Filter
8 HPOSITION Horizontal Position Filter (capacitor to be connected to HGND)
9 HFOCUSCAP Horizontal Dynamic Focus Oscillator Capacitor
10 FOCUS OUT Mixed Horizontal and Vertical Dynamic Focus Output
11 HGND
Horizontal Section Ground
12 HFLY
Horizontal Flyback Input (positive polarity)
13 HREF
Horizontal Section Reference Voltage (to be filtered)
14 COMP
B+ Error Amplifier Output for frequency compensation and gain setting
15 REGIN
Regulation Input of B+ control loop
16 ISENSE
17 B+GND
Sensing of external B+ switching transistor current,or switch for step-down converter
Ground (related to B+ reference adjustment)
18 BREATH
DC Breathing Input Control (compensation of vertical amplitude against EHV variation)
19 VGND
Vertical Section Ground
20 VAGCCAP
Memory Capacitor for Automatic Gain Control Loop in Vertical Ramp Generator
21 VREF
22 VCAP
Vertical Section Reference Voltage (to be filtered)
Vertical Sawtooth Generator Capacitor
23 VOUT
Vertical Ramp Output (with frequency independant amplitude and S or C Corrections if
any). It is mixed with vertical position voltage and vertical moiré.
24 EWOUT
Pin Cushion - E/W Correction Parabola Output
25 XRAY
X-RAY protection input (with internal latch function)
26 HOUT
Horizontal Drive Output (NPN open collector)
27 GND
28 BOUT
General Ground (referenced to VCC)
B+ PWM Regulator Output
29 VCC
30 SCL
31 SDA
Supply Voltage(12V typ)
I2C Clock Input
I2C Data Input
32 5V
Supply Voltage (5V typ.)
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TDA9109A arduino
TDA9109A
HORIZONTAL SECTION
Operating Conditions
Symbol
Parameter
VCO
I0max
F(max.)
Max Current from Pin 6
Maximum Oscillator Frequency
OUTPUT SECTION
I12m
Maximum Input Peak Current
HOI
Horizontal Drive Output Maximum
Current
Test Conditions
Pin 6
Pin 12
Pin 26, Sunk current
Electrical Characteristics (VDD = 12V, Tamb = 25°C))
Symbol
Parameter
SUPPLY AND REFERENCE VOLTAGES
VCC Supply Voltage
VDD Supply Voltage
ICC Supply Current
IDD Supply Current
VREF-H
Horizontal Reference Voltage
VREF-V
Vertical Reference Voltage
IREF-H
Max. Sourced Current on VREF-H
IREF-V
Max. Sourced Current on VREF-V
1st PLL SECTION
HpoIT
Delay Time for detecting polarity
change (see 3)
Test Conditions
Pin 29
Pin 32
Pin 29
Pin 32
Pin 13, I = -2mA
Pin 21, I = -2mA
Pin 13
Pin 21
Pin 1
Vvco
Vcog
Hph
Vbmi
Vbtyp
Vbmax
IPII 1U
IPII 1L
fo
dfo/dT
CR
HUnlock
VCO Control Voltage (Pin 7)
VCO Gain (Pin 7)
Horizontal Phase Adjustment
(see 4)
Horizontal Phase Setting Value (Pin 8)
(see 4)
Minimum Value
Typical Value
Maximum Value
PLL1 Filter Current Charge
Free Running Frequency
Free Running Frequency Thermal Drift
(No drift on external components)
(see 5)
PLL1 Capture Range
DC level pin 3 when PLL1 is locked
VREF-H = 8.2V
fH(Max.)
R0 = 6.49k,
C0 =820pF
% of Horizontal
Period
Sub-Address 01
fo
Byte x1111111
Byte x1000000
Byte x0000000
PLL1 is Unlocked
PLL1 is Locked
R0 = 6.49k,
C0 = 820pF
fH(Min.)
fH(Max.) (See Note 6)
Min.
Min.
10.8
4.5
7.6
7.6
0.75
Typ.
Typ.
12
5
50
5
8.2
8.2
1.4
6.4
15.9
±10
2.9
3.5
4.2
±140
±1
22.8
-150
fo+0.5
4.5fo
5
Max. Units
1.5 mA
150 kHz
5 mA
30 mA
Max. Units
13.2
5.5
8.8
8.8
5
5
V
V
mA
mA
V
V
mA
mA
ms
V
V
kHz/V
%
V
V
V
µA
mA
kHz
ppm/
C
kHz
kHz
V
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