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PDF TDA8740H Data sheet ( Hoja de datos )
| Número de pieza | TDA8740H | |
| Descripción | Satellite sound circuit with noise reduction | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
TDA8740; TDA8740H
Satellite sound circuit with noise
reduction
Product specification
Supersedes data of November 1992
File under Integrated Circuits, IC02
October 1994
Philips Semiconductors
1 page  
Philips Semiconductors
Satellite sound circuit with noise reduction
Product specification
TDA8740; TDA8740H
SYMBOL
CDC L
CDC M
CDC R
n.c.
n.c.
PIN
SDIP42
40
41
42
−
−
PIN
QFP44
36
37
38
12
44
DESCRIPTION
DC decoupling capacitor (left)
DC decoupling capacitor (main)
DC decoupling capacitor (right)
not connected
not connected
October 1994
Fig.2 Pin configuration (SDIP42).
5
5 Page 
Philips Semiconductors
Satellite sound circuit with noise reduction
Product specification
TDA8740; TDA8740H
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Secondary channels 1 and 2 - HF inputs pins 2, 4, 6, 8, 10, 12, 14 and 16 (1, 3, 5, 7, 9, 11, 40 and 42) and
limiters
VIN1,IN2
VI(rms)
Ri
input sensitivity (RMS value)
input signal level (RMS value)
input resistance
S/N(A) = 40 dB
− 0.8 1.5 mV
− − 200 mV
260 330 380 Ω
Secondary channels 1 and 2 - PLL FM demodulators (input selector in position 1)
fCCO1
fCCO2
∆fOS1/2
RS1,S2
free running frequency PLL1
free running frequency PLL2
lock range of PLLs
series resistance for optimum
frequency response
adjustment
note 3
− 7.0 − MHz
− 7.2 − MHz
6.0 −
8.5 MHz
0 0.22 1.0 kΩ
VCDCL,CDCR (rms)
PLL output voltage pins 40 pins to be left open-circuit − 7 − mV
and 42 (36 and 38) (RMS
value)
∆VCDCL,CDCR
spread of PLL output voltage
over lock range
− − ±1 dB
Secondary channels - overall performance of LPF and NR (input and output selectors in position 1)
Ro output resistance for 75 µs
de-emphasis pins 36 and 32
(32 and 28)
1.9 2.3 2.6
Ri input resistance of output
amplifiers pins 35 and 33
(31 and 29)
95 150 200
VOL,OR
output voltage level
pins 25 and 24 (21 and 20)
note 4
−8 −6 −4
UBS
unbalance voltage outputs
pins 25 and 24 (21 and 20)
note 4
−1 −
+1
THD
total harmonic distortion
note 4
− 0.1 0.5
S/N(A)
signal-to-noise ratio
A-weighted; note 4
72 80 −
Ro
output resistance pins 25 and note 4
92 125 150
24 (21 and 20)
MUTEatt
mute attenuation
output selector in
position 6; note 4
74 −
−
αS/S crosstalk attenuation between note 5 − 74 −
secondary channels
αM/S
crosstalk attenuation from
main channel to secondary
note 6
− 74 −
Voffset(DC)
DC offset voltage on
attack/recovery capacitors
pins 29, 39 (25, 35)
all PLLs locked; ∆f = 0
14 16 20
SVRR
supply voltage ripple rejection VRR = 100 mV; fi = 70 Hz −
25 −
kΩ
kΩ
dBV
dBV
%
dB
Ω
dB
dB
dB
mV
dB
October 1994
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet TDA8740H.PDF ] | |
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