TDA8708AT Datasheet PDF - NXP Semiconductors
| Part Number | TDA8708AT | |
| Description | Video analog input interface | |
| Manufacturers | NXP Semiconductors | |
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INTEGRATED CIRCUITS
DATA SHEET
TDA8708A
Video analog input interface
Product specification
Supersedes data of April 1993
File under Integrated Circuits, IC02
Philips Semiconductors
June 1994
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Philips Semiconductors
Video analog input interface
Product specification
TDA8708A
FUNCTIONAL DESCRIPTION
The TDA8708A provides a simple interface for decoding
video signals.
The TDA8708A operates in configuration mode 1 (see
Fig.4) when the video signals are weak (i.e. when the gain
of the AGC amplifier has not yet reached its optimum
value). This enables a fast recovery of the synchronization
pulses in the decoder circuit. When the pulses at the
GATE A and GATE B inputs become distinct (GATE A and
GATE B pulses are synchronization pulses occurring
during the sync period and rear porch respectively) the
TDA8708A automatically switches to configuration mode 2
(see Fig.5).
When the TDA8708A is in configuration mode 1, the gain
of the AGC amplifier will be roughly adjusted (sync level to
a digital output level of 0 and the peak level to a digital
output level of 255).
In configuration mode 2 the digital output of the ADC is
compared to internal digital reference levels. The resultant
outputs control the charge or discharge current of a
capacitor connected to the AGC pin. The voltage across
this capacitor controls the gain of the video amplifier. This
is the gain control loop.
The sync level comparator is active during a positive-going
pulse at the GATE A input. This means that the sync pulse
of the composite video signal is used as an amplitude
reference. The bottom of the sync pulse is adjusted to
obtain a digital output of logic 0 at the converter output. As
the black level is at digital level 64, the sync pulse will have
a digital amplitude of 64 LSBs.
The peak-white control loop is always active. If the video
signal tends to exceed the digital code of 248, the gain will
be limited to avoid any over-range of the converter.
The use of nominal signals will prevent the output from
exceeding a digital code of 213 and the peak-white control
loop will be non-active.
The clamp level control is accomplished by using the same
techniques as used for the gain control. The black-level
digital comparator is active during a positive-going pulse at
the GATE B input. The clamp capacitor will be charged or
discharged to adjust the digital output to code 64.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VCCA
VCCD
VCCO
∆VCC
VI
IO
Tstg
Tamb
Tj
PARAMETER
analog supply voltage
digital supply voltage
output supply voltage
supply voltage difference between VCCA and VCCD
supply voltage difference between VCCO and VCCD
supply voltage difference between VCCA and VCCO
input voltage
output current
storage temperature
operating ambient temperature
junction temperature
MIN.
−0.3
−0.3
−0.3
−1.0
−1.0
−1.0
−0.3
0
−55
0
0
MAX.
+7.0
+7.0
+7.0
+1.0
+1.0
+1.0
VCCA
+10
+150
+70
+125
UNIT
V
V
V
V
V
V
V
mA
°C
°C
°C
THERMAL CHARACTERISTICS
SYMBOL
Rth j-a
PARAMETER
thermal resistance from junction to ambient in free air
SOT117-1
SOT136-1
VALUE
55
70
UNIT
K/W
K/W
June 1994
5
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| Information | Total 24 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ TDA8708AT.PDF Datasheet ] | |
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| Part Number | Description | MFRS |
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