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PDF TDA8416 Data sheet ( Hoja de datos )

Número de pieza TDA8416
Descripción TV and VTR stereo/dual sound processor with integrated filters and I2C-bus control
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
TDA8416
TV and VTR stereo/dual sound
processor with integrated filters and
I2C-bus control
Preliminary specification
File under Integrated Circuits, IC02
November 1989

1 page




TDA8416 pdf
Philips Semiconductors
TV and VTR stereo/dual sound processor
with integrated filters and I2C-bus control
Preliminary specification
TDA8416
PINNING
1 Control port C1
2 SDA, serial data line (I2 C-bus)
3 SCL, serial clock line (I2 C-bus)
4 Oscillator input (or quartz)
5 Digital ground (0 V)
6 External AF input (E5)
7 Sound channel input AF2 (E2)
8 Sound channel input AF1 (E1)
9 External AF input (E4)
10 External AF input (E3)
11 Output A4 AF 2 output
12 Output A3 AF 2 output
13 Output A2 AF 1 output
14 Output A1 AF 1 output
15 Supply voltage VP
16 Analogue ground (0 V)
17 Ripple rejection improvement
18 Mute input
19 Control port C2
20 Module address (MAD)
FUNCTIONAL DESCRIPTION
Anti-aliasing filters
Frequency band limitation is performed by a second order Sallen and Key low-pass filter inserted in the AF signal path
and the identification circuit. This limitation is necessary because of the time-discrete signal processing needed to meet
the Nyquist criterium.
Identification
To enable the identification of the transmitted AF signal (mono, stereo or dual sound), the carrier frequency of the second
channel (E2) is also modulated by an identification signal. The identification signal is a 54.6875 kHz pilot carrier signal
which is 50% amplitude modulated by either a 117.4 Hz signal for stereo transmission or by a 274.1 Hz signal for dual
sound transmission.
The identification section of the circuit consists of a 54 kHz high-pass filter followed by a gain controlled amplifier with an
AM demodulator. The total gain of the high-pass filter and the amplifier is approximately 56 dB. The demodulated
identification signal is filtered by the identification band-pass filters, (117.4 Hz for stereo transmission, 274.1 Hz for dual
sound transmission). The output from either filter is converted to a DC signal by a peak detector and the necessary
hysteresis is performed by a Schmitt-trigger. The resultant DC output signals indicate the status of the transmitter (mono,
stereo or dual sound).
November 1989
5

5 Page





TDA8416 arduino
Philips Semiconductors
TV and VTR stereo/dual sound processor
with integrated filters and I2C-bus control
Preliminary specification
TDA8416
Table 5 defines the contents of the switch register.
Table 5 Switch register (1)
SWITCH
INPUT
OUTPUT
D7 D6 D5 D4 D3 D2 D1 D0 (HEX)
REGISTER
E1 E2 E3 E4 E5 A1 A2 A3 A4
sound mute − − − − − − no signal
0 0 0 0 0 0 0 0 (00)
mono
M M M − − − M M M M 0 0 0 1 0 0 0 0 (10)
St L* R − − − L* L* L* L* 0 0 0 1 0 0 0 0 (10)
stereo
sound A
St L* R − − − L R L R 0 0 1 0 1 0 1 0 (2A)
DS A B − − − A A A A 0 0 0 1 0 0 0 0 (10)
sound B
DS A B − − − B B B B 0 0 0 1 1 1 1 1 (1F)
dual sound DS A B − − − A A B B 0 0 0 1 1 1 0 0 (1C)
dual sound
DS A B − − − B B A A 0 0 0 1 0 0 1 1 (13)
DS A B − − − A B A A 0 0 0 1 0 0 1 0 (12)
mix DS A B − − − A A A B 0 0 0 1 1 0 0 0 (18)
DS A B − − − A B A B 0 0 0 1 1 0 1 0 (1A)
external
DS A B − − − B B A B 0 0 0 1 1 0 1 1 (1B)
DS A B − − − A B B B 0 0 0 1 1 1 1 0 (1E)
− − − E3 E4 E3 E3 E3 E3 0 1 1 1 0 0 0 0 (70)
− − − E3 E4 E4 E4 E4 E4 0 1 1 1 1 1 1 1 (7F)
− − − E3 E4 E3 E4 E3 E4 0 1 1 1 1 0 1 0 (7A)
− − − E3 E4 E4 E4 E3 E3 0 1 1 1 0 0 1 1 (73)
− − − E3 E4 E3 E3 E4 E4 0 1 1 1 1 1 0 0 (7C)
− − − E3 E4 E3 E4 E3 E3 0 1 1 1 0 0 1 0 (72)
− − − E3 E4 E3 E3 E3 E4 0 1 1 1 1 0 0 0 (78)
− − − E3 E4 E4 E4 E3 E4 0 1 1 1 1 0 1 1 (7B)
− − − E3 E4 E3 E4 E4 E4 0 1 1 1 1 1 1 0 (7E)
− − − − − E5 E5 E5 E5 E5 1 0 0 0 0 0 0 0 (80)
Note
1. M = mono;
St = stereo;
DS = dual sound;
R = right;
L = left;
L* = (L + R)/2;
A = sound A;
B = sound B
November 1989
11

11 Page







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