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Número de pieza TDA8359J
Descripción Full bridge vertical deflection output circuit in LVDMOS
Fabricantes NXP Semiconductors 
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INTEGRATED CIRCUITS
DATA SHEET
TDA8359J
Full bridge vertical deflection output
circuit in LVDMOS
Product specification
Supersedes data of 13 March 2000
Filed under Integrated Circuits, IC02
2002 Jan 21

1 page




TDA8359J pdf
Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Product specification
TDA8359J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
SYMBOL
PARAMETER
VP supply voltage
VFB flyback supply voltage
Vn DC voltage
pin OUTA
pin OUTB
pins INA, INB, GUARD and FEEDB
In DC current
pins OUTA and OUTB
pins OUTA and OUTB
pins INA, INB, GUARD and FEEDB
Ilu latch-up current
Ves
Ptot
Tstg
Tamb
Tj
electrostatic handling voltage
total power dissipation
storage temperature
ambient temperature
junction temperature
CONDITIONS
MIN.
note 1
0.5
during scan (p-p)
at flyback (peak); t 1.5 ms
current into any pin; pin voltage is
1.5 × VP; note 2
current out of any pin; pin voltage is
1.5 × VP; note 2
machine model; note 3
human body model; note 4
note 5
20
200
500
5 000
55
25
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. At Tj(max).
3. Equivalent to 200 pF capacitance discharge through a 0 resistor.
4. Equivalent to 100 pF capacitance discharge through a 1.5 kresistor.
5. Internally limited by thermal protection at Tj = 170 °C.
MAX.
18
68
68
VP
VP
3.2
±1.8
+20
+200
+500
+5 000
10
+150
+85
150
UNIT
V
V
V
V
V
A
A
mA
mA
mA
V
V
W
°C
°C
°C
THERMAL CHARACTERISTICS
In accordance with IEC 60747-1.
SYMBOL
PARAMETER
Rth(j-c)
Rth(j-a)
thermal resistance from junction to case
thermal resistance from junction to ambient
CONDITIONS
in free air
MAX.
3
65
UNIT
K/W
K/W
2002 Jan 21
5

5 Page





TDA8359J arduino
Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Product specification
TDA8359J
Flyback supply voltage calculation
If the flyback time is known, the required flyback supply
voltage can be calculated by the simplified formula:
VFB = Icoil(pp) × R-1----c---o--e-i-l--+--t--F-R-B----M-x-
where:
x = -R----c---oL---i-lc--+-o--i--lR-----M--
The flyback supply voltage calculated this way is
approximately 5% to 10% higher than required.
Calculation of the power dissipation of the vertical
output stage
The IC total power dissipation is given by the formula:
Ptot = Psup PL
The power to be supplied is given by the formula:
Psup = VP × I--c---o---i-l--(2-p---e---a---k--) + VP × 0.015 [A] + 0.3 [W]
In this formula 0.3 [W] represents the average value of the
losses in the flyback supply.
The average external load power dissipation in the
deflection coil and the measuring resistor is given by the
formula:
PL = -(--I--c--o---i--l-(--p3---e---a--k---)--)--2- × (Rcoil + RM)
Example
Table 1 Application values
SYMBOL
Icoil(peak)
Icoil(p-p)
Lcoil
Rcoil
RM
fvert
tFB
VALUE
1.2
2.4
5
6
0.6
50
640
UNIT
A
A
mH
Hz
µs
Table 2 Calculated values
SYMBOL
VP
RM + Rcoil (hot)
tvert
x
VFB
Psup
PL
Ptot
VALUE
14
7.8
0.02
0.000641
30
8.91
3.74
5.17
UNIT
V
s
V
W
W
W
Heatsink calculation
The value of the heatsink can be calculated in a standard
way with a method based on average temperatures. The
required thermal resistance of the heatsink is determined
by the maximum die temperature of 150 °C. In general we
recommend to design for an average die temperature
not exceeding 130 °C.
EXAMPLE
Measured or given values: Ptot = 6 W; Tamb(max) = 40 °C;
Tj = 120 °C; Rth(j-c) = 4 K/W; Rth(c-h) = 2 K/W.
The required heatsink thermal resistance is given by:
Rth(h a) = T----j----P----Tt--o-a-t--m----b- (Rth(j c) + Rth(c h))
When we use the values given we find:
Rth(h a) = 1----2---0---6-------4---0-- (4 + 2) = 7 K/W
The heatsink temperature will be:
Th = Tamb + (Rth(h-a) × Ptot) = 40 + (7 × 6) = 82 °C
2002 Jan 21
11

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