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PDF TDA7433D Data sheet ( Hoja de datos )
| Número de pieza | TDA7433D | |
| Descripción | BASIC FUNCTION AUDIO PROCESSOR | |
| Fabricantes | ST Microelectronics | |
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® TDA7433
BASIC FUNCTION AUDIO PROCESSOR
TWO STEREO AND ONE MONO INPUTS
CONTROLLED
MUTE FUNCTION (SOFTWARE AND HARD-
WARE)
VOLUME CONTROL IN 1dB STEP
FOUR SPEAKER ATTENUATORS:
– Independentattenuation control
– Independentmute function
ALL FUNCTIONS PROGRAMMABLE VIA
I2CBUS
DESCRIPTION
The TDA7433 is a volume, tone (bass and treble)
balance (Left/Right) processor for quality audio
applications in car radio and Hi-Fi systems.
Control is accomplished by serial bus microproc-
essor interface.
The AC signal setting is obtained by resistor net-
works and switches combined with operational
amplifiers.
BLOCK DIAGRAM
SO20
ORDERING NUMBER: TDA7433D
Thanks to the advanced BIPOLAR/CMOS Tech-
nology, the external components have been re-
duced.
IN1_L
IN2_L
6
3
MUX
VOL
4.7K
100nF
100nF
2.7nF
BINL
10
BOUTL
9
TRL
11
SPKR
ATT
16
LEFT FRONT
BASS
TREBLE
SPKR 14
ATT LEFT REAR
4
MONO IN/MUTE
S BUS DECODER + LATCHES
18
SCL
19
SDA
IN2_R
IN1_R
VS
2
5
17
MUX
SUPPLY
20
GND
VOL
1
CREF
BASS
TREBLE
SPKR
ATT
15
RIGHT FRONT
SPKR
ATT
13
RIGHT REAR
8
BINR
100nF
7
BOUTR
100nF
4.7K
12
TRR
2.7nF
D95AU354A
November 1999
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1 page  
TDA7433
ELECTRICAL CHARACTERISTICS (continued)
Symbol
GENERAL
VS
IS
PSRR
eNO
Parameter
Supply Voltage
Supply Current
Power Supply Rejection Ratio
Output Noise
S/N Signal to Noise Ratio
d Distortion
Sc Channel Separation
ET Total Tracking Error
BUS INPUTS
VIL Input Low Voltage
VIH Input High Voltage
IIN Input Current
VO Output Voltage
SDA Acknowledge
Test Condition
20Hz - 20kHz ”A” - weighted
BW = 200Hz - 20kHz, flat
output muted
all gains = 0dB; VO = 1Vrms
VOUT = 1Vrms
AV = 0 to -20dB
AV = -20 to -60dB
VIN = 0.4V
IO = 1.6mA
Min. Typ. Max. Unit
6 9 10.2 V
5 8 11 mA
65 85
dB
4 µV
7.0 20 µV
5.5 µV
102 dB
0.05 0.15
%
70 80
dB
0 1 dB
0 2 dB
1V
3V
-5 +5 µA
0.15 0.4
V
SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
– a start condition (S)
– a chip address byte (the LSB bit determines read /write transmission)
– a subaddress byte
– a sequence of data (N-bytes + acknowledge)
– a stop condition (P)
CHIP ADDRESS
SUBADDRESS
DATA 1...DATA n
MSB
LSB MSB
LSB MSB
S 1 0 0 0 1 0 1 R/W ACK X X X I A3 A2 A1 A0 ACK
ACK = Acknowledge
S = Start
P = Stop
MAX CLOCK SPEED 500kbits/s
DATA
LSB
ACK P
Auto Increment
If bit I in the subaddress byte is set to ”1”, the autoincrement of the subaddress is enabled.
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