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UT62L1024SC-35L fiches techniques PDF

ETC - 128K X 8 BIT LOW POWER CMOS SRAM

Numéro de référence UT62L1024SC-35L
Description 128K X 8 BIT LOW POWER CMOS SRAM
Fabricant ETC 
Logo ETC 





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UT62L1024SC-35L fiche technique
UTRON
Rev. 1.7
UT62L1024
128K X 8 BIT LOW POWER CMOS SRAM
FEATURES
„ Access time : 35/55/70ns (max.)
„ Low power consumption :
Operating : 40/35/30 mA (typical)
Standby : 2.5µA (typical) L-version
0.5µA (typical) LL-version
„ Power supply range : 2.7V to 3.6V
„ All inputs and outputs TTL compatible
„ Fully static operation
„ Three state outputs
„ Data retention voltage : 2V (min.)
„ Package : 32-pin 600 mil PDIP
32-pin 450 mil SOP
32-pin 8x20 mm TSOP-1
32-pin 8x13.4 mm STSOP
GENERAL DESCRIPTION
The UT62L1024 is a 1,048,576-bit low power
CMOS static random access memory organized
as 131,072 words by 8 bits. It is fabricated using
high performance, high reliability CMOS
technology.
Easy memory expansion is provided by using
two chip enable input.( CE 1 ,CE2) It is
particularly well suited for battery back-up
nonvolatile memory application.
The UT62L1024 operates from a single 2.7V~
3.6V power supply and all inputs and outputs
are fully TTL compatible.
FUNCTIONAL BLOCK DIAGRAM
A0-A16
Vcc
Vss
DECODER
2048 × 512
MEMORY
ARRAY
I/O1-I/O8
I/O DATA
CIRCUIT
COLUMN I/O
CE1
CE2
OE
WE
CONTROL
CIRCUIT
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
P80033

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