PDF UPD77016 Data sheet ( Hoja de datos )

Número de pieza	UPD77016
Descripción	16 bits/ Fixed-point Digital Signal Processor
Fabricantes	NEC
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No Preview Available ! DATA SHEET MOS INTEGRATED CIRCUIT µPD77016 16 bits, Fixed-point Digital Signal Processor µPD77016 is a 16 bits fixed-point DSP (Digital Signal Processor) developed for digital signal processing with its demand for high speed and precision. FEATURES • FUNCTIONS • Instruction cycle: 30 ns (MIN.) with 33 MHz clock • Dual load/store • Hardware loop function • Conditional execution • Executes product-sum operation in one instruction cycle • PROGRAMMING • 16 bits × 16 bits + 40 bits → 40 bits multiply accumulator • 8 general registers (40 bits each) • 8 ROM/RAM data pointer: each data memory area has 4 registers • 10 source interrupts (external: 4, internal: 6) • 3 operand instructions (example: R0 = R0 +R1L∗R2L) • Nonpipeline on execution stage • MEMORY AREAS • Program memory area: 64K words × 32 bits • Two independent data memory areas: 64K words × 16 bits (X/Y memory) • ON-CHIP PERIPHERAL • I/O port: 4 bits • Serial I/O (16 bits): 2 channels • CMOS • +5 V single power supply ORDERING INFORMATION Part Number Package µPD77016GM-KMD 160-pin plastic QFP (FINE PITCH) (24 × 24 mm) The information in this document is subject to change without notice. Document No. U10891EJ5V0DS00 (5th edition) Date Published April 1998 N CP(K) Printed in Japan The mark shows major revised points. © 1992, 1994, 1995 1 page PIN CONFIGURATION µPD77016GM-KMD 160-pin plastic QFP (FINE PITCH) (24 × 24 mm) (Top View) µPD77016 RESET INT4 INT3 INT2 INT1 WAIT HOLDRQ CLKIN P3 P2 P1 P0 CLKOUT GND VDD MWR MRD BSTB HOLDAK X/Y DA15 DA14 DA13 DA12 GND VDD DA11 DA10 DA9 DA8 DA7 DA6 DA5 DA4 GND VDD DA3 DA2 DA1 DA0 160159158 157 156155 154 153152151 150 149148 147 146145144 143142141 140 139138 137 136135 134 133 132 131130129 128 127126 125 124123 122 121 1 120 2 119 3 118 4 117 5 116 6 115 7 114 8 113 9 112 10 111 11 110 12 109 13 108 14 107 15 106 16 105 17 104 18 103 19 102 20 101 21 100 22 99 23 98 24 97 25 96 26 95 27 94 28 93 29 92 30 91 31 90 32 89 33 88 34 87 35 86 36 85 37 84 38 83 39 82 40 81 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 IA0 IA1 IA2 IA3 VDD GND IA4 IA5 IA6 IA7 IA8 IA9 IA10 IA11 VDD GND IA12 IA13 IA14 IA15 TMS TDI TCK TIC TDO VDD GND HWE HRE HD0 HD1 HD2 HD3 HD4 HD5 HD6 HD7 HA1 HA0 HWR 5 5 Page µPD77016 • Serial interface Symbol SCK1 65 SORQ1 68 SOEN1 69 SO1 67 SIEN1 64 SI1 63 SCK2 76 SORQ2 73 SOEN2 72 SO2 74 SIEN2 77 SI2 78 SIAK1 66 SIAK2 75 Pin No. I/O Function I Clock input for serial 1 O Serial output 1 request I Serial output 1 enable O (3S) Serial data output 1 I Serial input 1 enable I Serial data input 1 I Clock input for serial 2 O Serial output 2 request I Serial output 2 enable O (3S) Serial data output 2 I Serial input 2 enable I Serial data input 2 O Serial input 1 acknowledge O Serial input 2 acknowledge Remark The state of the pins added 3S becomes high impedance, when data output have been finished or RESET is input. 11 11 Page

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