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PDF UPD75P3116 Data sheet ( Hoja de datos )
| Número de pieza | UPD75P3116 | |
| Descripción | 4-BIT SINGLE-CHIP MICROCONTROLLER | |
| Fabricantes | NEC | |
| Logotipo |  |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75P3116
4-BIT SINGLE-CHIP MICROCONTROLLER
The µPD75P3116 replaces the µPD753108’s internal mask ROM with a one-time PROM, and features expanded ROM
capacity.
Because the µPD75P3116 supports programming by users, it is suitable for use in evaluation of systems in the
development stage using the µPD753104, 753106, or 753108, and for use in small-scale production.
Detailed information about functions is provided in the following User’s Manual. Be sure to read it before
designing:
µPD753108 User’s Manual : U10890E
FEATURES
Compatible with µPD753108
Memory capacity:
• PROM : 16384 x 8 bits
• RAM : 512 x 4 bits
Can be operated in same power supply voltage range as the mask version µPD753108
• VDD = 1.8 to 5.5 V
On-chip LCD controller/driver
QTOPTM microcontroller
Remark QTOP microcontrollers are microcontrollers with on-chip one-time PROM that are totally supported by NEC.
The support include writing application programs, marking, screening, and verification.
ORDERING INFORMATION
Part Number
µPD75P3116GC-AB8
µPD75P3116GK-8A8
Package
64-pin plastic QFP (14 x 14 mm, 0.8-mm pitch)
64-pin plastic QFP (12 x 12 mm, 0.65-mm pitch)
Caution This device does not provide an internal pull-up resistor connection function by means of mask
option.
The information in this document is subject to change without notice.
Document No. U11369EJ2V0DS00 (2nd edition)
Date Published March 1997 N
Printed in Japan
The mark shows major revised points.
©
1994
1 page  
2. BLOCK DIAGRAM
µPD75P3116
BUZ/P23
WATCH
TIMER
INTW fLCD
BASIC
INTERVAL
TIMER/
WATCHDOG
TIMER
INTBT
TI0/P13
PTO0/P20
8-BIT
TIMER/EVENT
COUNTER #0
TI1/TI2/
P12/INT2
PTO1/P21
PTO2/
PCL/P22
TOUT0
INTT0 TOUT0
INTT1
8-BIT CASCADED
TIMER/EVENT 16-BIT
COUNTER #1 TIMER/
8-BIT EVENT
TIMER/EVENT COUNTER
COUNTER #2
INTT2
SI/SB1/P03
SO/SB0/P02
SCK/P01
CLOCKED
SERIAL
INTERFACE
INTCSI TOUT0
INT0/P10
INT1
INT1/P11
INT4/P00
INT2/P12/TI1/TI2
INTERRUPT
CONTROL
P60/KR0 to
P63/KR3
4
BIT SEQ.
BUFFER (16)
PORT0 4 P00 to P03
PROGRAM
COUNTER (14)
SP (8)
ALU
CY
SBS
BANK
PORT1 4 P10 to P13
PORT2 4 P20 to P23
P30/MD0 to
PORT3 4 P33/MD3
PROGRAM
MEMORY
(PROM)
16384 x 8 BITS
DECODE
AND
CONTROL
GENERAL
REG.
DATA
MEMORY
(RAM)
512 x 4 BITS
PORT5 4 P50/D4 to
P53/D7
PORT6 4 P60/D0 to
P63/D3
PORT8 4 P80 to P83
PORT9 4 P90 to P93
16 S0 to S15
4
S16/P93 to
S19/P90
4
S20/P83 to
S23/P80
fx/2 N
CPU CLOCK Φ
CLOCK
OUTPUT
CONTROL
CLOCK
DIVIDER
SYSTEM CLOCK
GENERATOR
MAIN SUB
STAND BY
CONTROL
fLCD
PCL/PTO2/P22
X1 X2 XT1XT2
VDD Vss VPP RESET
4 COM0 to COM3
BIAS
VLC0
VLC1
VLC2
SYNC/P31
LCDCL/P30
5
5 Page 
TYPE F-B
Output
disable
(P)
Data
Output
disable
Output
disable
(N)
P.U.R.
enable
TYPE H
VDD
P.U.R.
P-ch
VDD
P-ch
IN/OUT
SEG
data
N-ch
Data
Output
disable
Type G-A
Type E-B
µPD75P3116
(Continued)
P-ch IN/OUT
N-ch
P.U.R. : Pull-Up Resistor
TYPE G-A
VLC0
VLC1
P-ch
N-ch
P-ch
N-ch
P-ch N-ch
SEG
data
VLC2
P-ch
N-ch
N-ch
N-ch
TYPE M-C
OUT
Data
Output
disable
P.U.R.
enable
VDD
P.U.R.
P-ch
IN/OUT
N-ch
P.U.R. : Pull-Up Resistor
TYPE G-B
VLC0
VLC1
P-ch
N-ch
P-ch
N-ch
P-ch N-ch
COM
data
VLC2
N-ch
N-ch P-ch
P-ch
N-ch
TYPE M-E
Data
Output
disable
Input instruction
OUT
VDD
P-ch
N-ch
(+13-V
withstand
voltage)
P.U.R.Note
IN/OUT
Voltage
controller
(+13-V
withstand
voltage)
Note Pull-up resistor that operates only when an input
instruction is executed. (The current flows from
VDD to a pin when the pin is at low level.)
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD75P3116.PDF ] | |
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