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V62C5181024L-35WI fiches techniques PDF

Mosel Vitelic Corp - 128K X 8 STATIC RAM

Numéro de référence V62C5181024L-35WI
Description 128K X 8 STATIC RAM
Fabricant Mosel Vitelic Corp 
Logo Mosel Vitelic  Corp 





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V62C5181024L-35WI fiche technique
MOSEL VITELIC V62C5181024
128K X 8 STATIC RAM
PRELIMINARY
Features
s High-speed: 35, 70 ns
s Ultra low DC operating current of 5mA (max.)
TTL Standby: 5 mA (Max.)
CMOS Standby: 60 µA (Max.)
s Fully static operation
s All inputs and outputs directly compatible
s Three state outputs
s Ultra low data retention current (VCC = 2V)
s Single 5V ± 10% Power Supply
s Packages
– 32-pin TSOP (Standard)
– 32-pin 600 mil PDIP
– 32-pin 440 mil SOP (525 mil pin-to-pin)
Description
The V62C5181024 is a 1,048,576-bit static
random-access memory organized as 131,072
words by 8 bits. It is built with MOSEL VITELIC’s
high performance CMOS process. Inputs and
three-state outputs are TTL compatible and allow
for direct interfacing with common system bus
structures.
Functional Block Diagram
A0 VCC
Row
Decoder
1024 x 1024
Memory Array
GND
A9
I/O0 Column I/O
Input
Data
Circuit
Column Decoder
I/O7
CE1
CE2 Control
OE Circuit
WE
A10
A16
5181024 01
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
–40°C to +85°C
Package Outline
TWP
•••
•••
Access Time (ns)
35 70
••
••
Power
L LL
••
••
Temperature
Mark
Blank
I
V62C5181024 Rev. 2.2 February 2000
1

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