|
|
PDF V610852F Data sheet ( Hoja de datos )
| Número de pieza | V610852F | |
| Descripción | 40 Segment Static LCD Driver | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de V610852F (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
EM MICROELECTRONIC-MARIN SA
V6108
40 Segment Static LCD Driver
Features
n Serial data input / output
n Low dynamic current, 5 µA max.
n Low standby current, 1 µA max.
n Separate input and display voltages
n Wide power supply range:
VDD (logic) 2 to 8 V, VLCD (display) VDD to 12 V
n On-chip latches separate control and display sections
n Drives up to 40 LCD segments in direct drive
n Crossfree cascadable
n Schmitt Trigger on the inputs
n 30 ns (typ.) glitch filter on every input
n High noise immunity
n Segment outputs short circuit protected
n LCD blanking function
n - 40 to +85 OC temperature range
n On request extended temperature range,
- 40 to +125 OC
n QFP52 and TAB packages
Typical Operating Configuration
V6108
SEG 41- 80
V6108
Description
The V 6108 is a CMOS integrated circuit that drives LCD.
The circuit drives up to 40 LCD segments from a serial clocked
input. It has a serial output for cascading to further drives. The
serially clocked data is parallel loaded into 40 latches under
control of the strobe pin. The latched data determines which
segments are ON or OFF. Any segment output can be used to
drive a backplane. A blank function is provided to clear the
display.
Applications
n Balances and scales
n Automotive displays
n Utility meters
n Large displays
n Pagers
n Portable, battery operated products
n Telephones
STR
QFP52
1
V6108
1
1 page  
V6108
100
90
80
70
60
50
40
30
20
10
0 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 10.5 11
VDD
CLK
DI
Shift Register
40 Bits
40 Latches
STR
AC
FR
LS2)
VSS
1) F = Noise Filter
SEG
2) LS = Voltage Level Shifter
LS2)
SEG 40
DO
Fig. 8
S1...S40
VLCD
VFRDD
DI
DO
CLK
STR
R
VSS
Functional Description
Table 5
Supply Voltages VLCD, VDD, VSS
VDD is the positive supply line for the logic and VLCD for the
display signals. VLCD has to be equal or higher than VDD. All
voltages are specified relative to VSS.
Data Input / Output (DI / DO)
The data input pin (Dl) accepts serial data from the data source.
The data is clocked in a rate determined by the clock input
frequency (CLK). A logic "1" on Dl corresponds to a visible
segment when the backplane is driven by a signal
corresponding to logic "0". The data at DO is equal to
the data at Dl delayed by 40 clock periods. In
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet V610852F.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| V610852F | 40 Segment Static LCD Driver | ETC |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |