V55C2128164VB Datasheet PDF - Mosel Vitelic Corp
| Part Number | V55C2128164VB | |
| Description | 128Mbit LOW-POWER SDRAM 2.5 VOLT/ TSOP II / BGA PACKAGE 8M X 16 | |
| Manufacturers | Mosel Vitelic Corp | |
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MOSEL VITELIC
V55C2128164V(T/B)
128Mbit LOW-POWER SDRAM
2.5 VOLT, TSOP II / BGA PACKAGE
8M X 16
PRELIMINARY
System Frequency (fCK)
Clock Cycle Time (tCK3)
Clock Access Time (tAC3) CAS Latency = 3
Clock Access Time (tAC2) CAS Latency = 2
Clock Access Time (tAC1) CAS Latency = 1
6
166 MHz
6 ns
5.4 ns
5.4 ns
19 ns
7PC
143 MHz
7 ns
5.4 ns
5.4 ns
19 ns
7
143 MHz
7 ns
5.4 ns
6 ns
19 ns
8PC
125 MHz
8 ns
6 ns
6 ns
19 ns
10
100MHz
10 ns
7 ns
8 ns
22 ns
Features
■ 4 banks x 2Mbit x 16 organization
■ High speed data transfer rates up to 166 MHz
■ Full Synchronous Dynamic RAM, with all signals
referenced to clock rising edge
■ Single Pulsed RAS Interface
■ Data Mask for Read/Write Control
■ Four Banks controlled by BA0 & BA1
■ Programmable CAS Latency:1, 2, 3
■ Programmable Wrap Sequence: Sequential or
Interleave
■ Programmable Burst Length:
1, 2, 4, 8, Full page for Sequential Type
1, 2, 4, 8 for Interleave Type
■ Multiple Burst Read with Single Write Operation
■ Automatic and Controlled Precharge Command
■ Random Column Address every CLK (1-N Rule)
■ Power Down Mode and Clock Suspend Mode
■ Deep Power Mode
■ Auto Refresh and Self Refresh
■ Refresh Interval: 4096 cycles/64 ms
■ Available in 54-ball FBGA, with 9x6 ball array
with 3 depupulated rows, 9x8 mm and 54 pin
TSOP II
■ VDD=2.5V, VDDQ=1.8V
■
■ Programmable Power Reduction Feature by par-
tial array activation during Self-Refresh
■ Operating Temperature Range
Commercial (0°C to 70°C)
Extended (-25°C to +85°C)
Device Usage Chart
Operating
Temperature
Range
0°C to 70°C
-25°C to 85°C
Package Outline
T/B
•
•
V55C2128164V(T/B) Rev. 1.2 August 2002
6
•
•
1
Access Time (ns)
7PC 7 8PC
•••
•••
Temperature
10 Mark
• Commercial
• Extended
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MOSEL VITELIC
V55C2128164V(T/B)
Operation Definition
All of SDRAM operations are defined by states of control signals CS, RAS, CAS, WE, and DQM at the
positive edge of the clock. The following list shows the thruth table for the operation commands.
Operation
Row Activate
Read
Read w/Autoprecharge
Write
Write with Autoprecharge
Row Precharge
Precharge All
Mode Register Set
No Operation
Device Deselect
Auto Refresh
Self Refresh Entry
Self Refresh Exit
Power Down Entry
Power Down Exit
Data Write/Output Enable
Data Write/Output Disable
Deep Pwoer Down Entry
Deep Pwoer Down Exit
Device CKE CKE
A0-9,
BS0
State n-1 n CS RAS CAS WE DQM A11 A10 BS1
Idle3 H X L L H H X V V V
Active3
H
X
LHLHXVL
V
Active3
H
X
L
H
L
H
X
V
H
V
Active3
H
X
LHL
L
XVL
V
Active3
H
X
L
H
L
L
X
V
H
V
Any H X L L H L X X L V
Any H X L L H L X X H X
Idle H X L L L L X V V V
Any
HX
L HHH X
XX
X
Any H X H X X X X X X X
Idle H H L L L H X X X X
Idle H L L L L H X X X X
Idle H X X X
(Self Refr.) L
H
XXX X
LHHX
Idle H X X X
Active4
H
L
XXX X
LHHX
Any H X X X
(Power
L
H
XXX X
Down)
LHHL
Active H X X X X X L X X X
Active H X X X X X H X X X
Idle H L L H H L H X X X
Deep power- L H X X X X H X X X
Down
Notes:
1. V = Valid , x = Don’t Care, L = Low Level, H = High Level
2. CKEn signal is input level when commands are provided, CKEn-1 signal is input level one clock before the commands
are provided.
3. These are state of bank designated by BS0, BS1 signals.
4. Power Down Mode can not entry in the burst cycle.
5. After Deep Power Down mode exit a full new initialization of memory device is mandatory
V55C2128164V(T/B) Rev. 1.2 August 2002
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for V55C2128164VB electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ V55C2128164VB.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| V55C2128164V | The function is 128Mbit LOW-POWER SDRAM 2.5 VOLT/ TSOP II / BGA PACKAGE 8M X 16. Mosel Vitelic Corp | |
| V55C2128164VB | The function is 128Mbit LOW-POWER SDRAM 2.5 VOLT/ TSOP II / BGA PACKAGE 8M X 16. Mosel Vitelic Corp | |
| V55C2128164VT | The function is 128Mbit LOW-POWER SDRAM 2.5 VOLT/ TSOP II / BGA PACKAGE 8M X 16. Mosel Vitelic Corp | |
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