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PDF V436616Y24VATG-75 Data sheet ( Hoja de datos )

Número de pieza V436616Y24VATG-75
Descripción 3.3 VOLT 16M x 64 HIGH PERFORMANCE 133 MHZ SDRAM UNBUFFERED SODIMM
Fabricantes Mosel Vitelic Corp 
Logotipo Mosel Vitelic  Corp Logotipo



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No Preview Available ! V436616Y24VATG-75 Hoja de datos, Descripción, Manual

MOSEL VITELIC
V436616Y24VATG-75
3.3 VOLT 16M x 64 HIGH PERFORMANCE
133 MHZ SDRAM
UNBUFFERED SODIMM
PRELIMINARY
Features
s JEDEC-standard 144 pin, Small-Outline, Dual in
line Memory Module (SODIMM)
s Serial Presence Detect with E2PROM
s Nonbuffered
s Fully Synchronous, All Signals Registered on
Positive Edge of System Clock
s Single +3.3V (± 0.3V) Power Supply
s All Device Pins are LVTTL Compatible
s 8192 Refresh Cycles every 64 ms
s Self-Refresh Mode
s Internal Pipelined Operation; Column Address
can be changed every System Clock
s Auto Precharge and Piecharge all Banks by A10
s Data Mask Function by DQM
s Mode Register Set Programming
s Programmable (CAS Latency:2, 3 Clocks)
Description
The V436616Y24VATG-75 memory module is
organized 16,777,216 x 64 bits in a 144 pin
SODIMM. The 16M x 64 memory module uses 4
Mosel-Vitelic 16M x 16 SDRAM. The x64 modules
are ideal for use in high performance computer
systems where increased memory density and fast
access times are required.
Part Number
V436616Y24VATG-75
Speed
Grade
-75
(133 MHz)
Configuration
16M x 64
16M x 16
16M x 16
16M x 16
16M x 16
1 59 61
Pin 2 on Backside
143
Pin 144 on Backside
V436616Y24VATG-75 Rev. 1.3 October 2001
1

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V436616Y24VATG-75 pdf
MOSEL VITELIC
SPD-Table for 75 modules: (Continued)
Byte Number Function Described
31 Module Bank Density (Per Bank)
32 SDRAM Input Setup Time
33 SDRAM Input Hold Time
34 SDRAM Data Input Setup Time
35 SDRAM Data Input Hold Time
62-61
Superset Information (May be used in Future)
62 SPD Revision
63 Checksum for Bytes 0 - 62
64 Manufacturers JEDEC ID Code
65-71
Manufacturers JEDEC ID Code (cont.)
72 Manufacturing Location
73-90
Module Part Number (ASCII)
91-92
PCB Identification Code
93 Assembly Manufacturing Date (Year)
94 Assembly Manufacturing Date (Week)
95-98
Assembly Serial Number
99-125
Reserved
126 Intel Specification for Frequency
127 Reserved
128+
Unused Storage Location
DC Characteristics
TA = 0°C to 70°C; VSS = 0 V; VDD, VDDQ = 3.3V ± 0.3V
Symbol Parameter
VIH
VIL
VOH
VOL
II(L)
IO(L)
Input High Voltage
Input Low Voltage
Output High Voltage (IOUT = 4.0 mA)
Output Low Voltage (IOUT = 4.0 mA)
Input Leakage Current, any input
(0 V < VIN < 3.6 V, all other inputs = 0V)
Output leakage current
(DQ is disabled, 0V < VOUT < VCC)
V436616Y24VATG-75
SPD Entry Value
128 Mbyte
1.5 ns
0.8 ns
1.5 ns
0.8 ns
Revision 2
Mosel Vitelic
1 = US, 2 = Taiwan
V436616Y24VATG-75
Current PCB Revision
Binary Coded year (BCD)
Binary Coded week (BCD)
byte 95 = LSB, byte 98 = MSB
Hex Value
16Mx64
20
15
08
15
08
00
02
1D
40
00
00
64
00
00
Limit Values
Min.
Max.
2.0
0.5
VCC+0.3
0.8
2.4
0.4
40 40
40 40
Unit
V
V
V
V
µA
µA
V436616Y24VATG-75 Rev. 1.3 October 2001
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V436616Y24VATG-75 arduino
MOSEL VITELIC
Module Label Information
V436616Y24VATG-75
Part Number
Criteria of PC100 or PC133
(refer to MVI datasheet)
MOSEL VITELIC
V436616Y24VATG-75
PC133U-333-542-A
Taiwan XXXX-XXXXXXX
DIMM manufacture date code
Trace Code
PC133 U - 333 - 54 2 - A
UNBUFFERED DIMM
CL = 3 (CLK)
tRCD = 3 (CLK)
tRP = 3 (CLK)
Gerber file Intel® PC100 x 16 Based
Intel SPD Revision 2.0
tAC = 5.4 ns
V436616Y24VATG-75 Rev. 1.3 October 2001
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