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PDF V436516R04VL Data sheet ( Hoja de datos )

Número de pieza V436516R04VL
Descripción 3.3 VOLT 16M x 64 LOW PROFILE UNBUFFERED SDRAM MODULE
Fabricantes Mosel Vitelic Corp 
Logotipo Mosel Vitelic  Corp Logotipo



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No Preview Available ! V436516R04VL Hoja de datos, Descripción, Manual

MOSEL VITELIC
V436516R04V(L)
3.3 VOLT 16M x 64 LOW PROFILE
UNBUFFERED SDRAM MODULE
PRELIMINARY
Features
s 168 Pin Unbuffered16,777,216 x 64 bit
Oganization SDRAM DIMM
s Utilizes High Performance 128 Mbit, 8M x 16
SDRAM in TSOPII-54 Packages
s Fully PC Board Layout Compatible to INTEL’S
Rev 1.0 Module Specification
s Single +3.3V (± 0.3V) Power Supply
s Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
s Auto Refresh (CBR) and Self Refresh
s All Inputs, Outputs are LVTTL Compatible
s 4096 Refresh Cycles every 64 ms
s Serial Present Detect (SPD)
s SDRAM Performance
Description
The V436516R04V(L) memory module is
organized 16,777,216 x 64 bits in a 168 pin dual in
line memory module (DIMM). The 16M x 64
memory module uses 8 Mosel-Vitelic 8M x 16
SDRAM. The x64 modules are ideal for use in high
performance computer systems where increased
memory density and fast access times are required.
Part Number
Speed
Grade Configuration
V436516R04VXTG-75L
-75, CL=3
(133 MHz)
16M x 64
V436516R04VXTG-75PCL -75PC, CL=2,3
(133 MHz)
16M x 64
V436516R04VXTG-10PCL -10PC, CL=2,3
(100 MHz)
16M x 64
V436516R04V(L) Rev. 1.0 October 2001
1

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V436516R04VL pdf
MOSEL VITELIC
V436516R04V(L)
SPD (Continued)Table
Byte Num-
ber Function Described
28 Minimum Row Active to Row Active Delay
tRRD
29 Minimum RAS to CAS Delay tRCD
30 Minimum RAS Pulse Width tRAS
31 Module Bank Density (Per Bank)
32 SDRAM Input Setup Time
33 SDRAM Input Hold Time
34 SDRAM Data Input Setup Time
35 SDRAM Data Input Hold Time
62-61
Superset Information (May be used in Future)
62 SPD Revision
63 Checksum for Bytes 0 - 62
64 Manufacturer’s JEDEC ID Code
65-71
Manufacturer’s JEDEC ID Code (cont.)
72 Manufacturing Location
73-90
Module Part Number (ASCII)
91-92
PCB Identification Code
93 Assembly Manufacturing Date (Year)
94 Assembly Manufacturing Date (Week)
95-98
Assembly Serial Number
99-125 Reserved
126 Intel Specification for Frequency
127 Supported frequency
128+
Unused Storage Location
SPD Entry Value
14 ns/15 ns/16 ns
15 ns/20 ns
42 ns/45 ns
64 MByte
1.5 ns/2.0 ns
0.8 ns/1.0 ns
1.5 ns/2.0 ns
0.8 ns/1.0 ns
Revision 2/1.2
Mosel Vitelic
V436516R04V(L)
-75PC
0E
0F
2A
10
15
08
15
08
00
02
D2
40
00
Hex Value
-75
0F
14
2D
10
15
08
15
08
00
02
17
40
00
-10PC
10
14
2D
10
20
10
20
10
00
12
85
40
00
00 00 00
64 64 64
00 00 00
DC Characteristics
TA = 0°C to 70°C; VSS = 0 V; VDD, VDDQ = 3.3V ± 0.3V
Symbol
VIH
VIL
VOH
VOL
Parameter
Input High Voltage
Input Low Voltage
Output High Voltage (IOUT = –2.0 mA)
Output Low Voltage (IOUT = 2.0 mA)
Limit Values
Min.
Max.
2.0
–0.5
VCC+0.3
0.8
2.4 —
— 0.4
Unit
V
V
V
V
V436516R04V(L) Rev.1.0 October 2001
5

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V436516R04VL arduino
MOSEL VITELIC
Label Information
V436516R04V(L)
Part Number
Criteria of PC100 or PC133
(refer to MVI datasheet)
DIMM manufacture date code
Module Density
MOSEL VITELIC
V436516R04XXX-XXL128MB CLX
PC133U-XXX-542-A
XXXX-XXXXXX
Assembly in Taiwan
CAS Latency
2 = CL2
3 = CL3
PC133 U - XXX - 54 2 - A
UNBUFFERED DIMM
CL = 3 or 2 (CLK)
tRCD = 3 or 2 (CLK)
tRP = 3 or 2 (CLK)
Gerber file ® PC100 x 16 Based
JEDEC SPD Revision 2
tAC = 5.4 ns
V436516R04V(L) Rev.1.0 October 2001
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