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PDF VSP3100Y Data sheet ( Hoja de datos )
| Número de pieza | VSP3100Y | |
| Descripción | 14-Bit/ 10MHz CCD/CIS SIGNAL PROCESSOR | |
| Fabricantes | Burr-Brown Corporation | |
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®
VSP3100
VSP3100
For most current data sheet and other product
information, visit www.burr-brown.com
14-Bit, 10MHz
CCD/CIS SIGNAL PROCESSOR
FEATURES
q INTEGRATED TRIPLE-CORRELATED
DOUBLE SAMPLER
q OPERATION MODE SELECTABLE:
1-Channel, 3-Channel, 10MSPS (typ),
CCD/CIS Mode
q PROGRAMMABLE GAIN AMPLIFIER:
0dB to +13dB
q SELECTABLE OUTPUT MODES:
Normal/Demultiplexed
q OFFSET CONTROL RANGE: ±400mV
q +3V, +5V Digital Output
q LOW POWER: 450mW (typ)
q LQFP-48 SURFACE-MOUNT PACKAGE
DESCRIPTION
The VSP3100 is a complete CCD/CIS image proces-
sor which operates from a single +5V supply.
This complete image processor includes three Corre-
lated Double Samplers (CDS) and Programmable Gain
Amplifiers (PGA) to process CCD signals.
These three channel inputs also allow Contact Image
Sensor (CIS) inputs.
The VSP3100 is an interface compatible with the
VSP3000 which is 12-bit one-chip product.
The VSP3100 can be operated from 0°C to +85°C and
is available in an LQFP-48 package.
CLP
RINP
INN
Clamp
GINP
Clamp
10 10-Bit
DAC
BINP
Clamp
Offset
Register
R
G
B
10 10-Bit
DAC
10 10-Bit
DAC
CK1 CK2
CDS
CDS
ADCCK
TP0
VREF
PGA
Timing Generator
5
Reference
Circuit
PGA
5
MUX
14-Bit
A/D
Digital
Output
14 Control
CDS
PGA
Configuration
Register
8
5
VSP3100
Gain
Control
Register
R
G
B
5
Register
Port
3
10
CM
REFP
REFN
OE
VDRV
B0-B13
(A0-A2, D0-D9)
P/S
WRT
RD
SCLK
SD
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 2000 Burr-Brown Corporation
PDS-1583A
Printed in U.S.A. April, 2000
1 page  
TIMING DIAGRAMS
Timing Specifications: VCC = +5V supply and normal output mode with the specified temperature range, unless otherwise noted.
1-Channel CCD Mode Timing
CCD Output
CK1
CK2
ADCCK
Pixel 1
Pixel 2
tCK1W-1
tS
tS
tCK1P-1
tCK1CK2-1
tCK2W-1
tCK2CK1-1
tSET
tCK1ADC
tADCW
tADCP
tADCCK2-1
Pixel 1
tADCW
tCNV
SYMBOL
tCK1W-1
tCK1P-1
tCK2W-1
tCK1CK2-1
tCK2CK1-1
tCK1ADC
tADCCK2-1
tADCW
tADCP
tS
tSET
tCNV
PARAMETER
CK1 Pulse Width
1-Channel Mode Conversion Rate
CK2 Pulse Width
CK1 Falling to CK2 Rising
CK2 Falling to CK1 Rising
CK1 Rising to ADCCK Falling
ADCCK Falling to CK2 Falling
ADCCK Pulse Width
ADCCK Period
Sampling Delay
ADCCK Rising to CK1 Rising
Conversion Delay
MIN
TYP
MAX
20 40
100 166
20 40
15
40
20
15
41 83
83 166
10
10
40
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1-Channel CIS Mode Timing
CIS Output
CK1
ADCCK
SYMBOL
tCK1W-1
tCK1P-1
tADCW
tADCP
tS
tSET
tCNV
Pixel 1
tS
tCK1W-1
Pixel 2
tCK1P-1
tSET
tCNV
Pixel 1
tADCW
tADCP
tADCW
PARAMETER
CK1 Pulse Width
1-Channel Mode Conversion Rate
ADCCK Pulse Width
ADCCK Period
Sampling Delay
ADCCK Falling to CK1 Rising
Conversion Delay
tSET
Pixel 2
MIN
TYP
MAX
UNITS
20 40
100 166
41 83
83 166
10
10
40
ns
ns
ns
ns
ns
ns
ns
5 VSP3100
®
5 Page 
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VCC = +5V supply, tADCCK = 6MHz, fCK1 = 2MHz, fCK2 = 2MHz, PGA Gain = 1, normal output mode, no load, unless otherwise specified.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
PGA TRANSFER FUNCITON
SAMPLE QUALITY, N = 100
5 10 15 20 25 30 35
PGA Gain Setting
500
450
400
350
300
250
200
4.7
POWER DISSIPATION vs POWER SUPPLY
1 CH MODE
5
Power Supply Voltage (V)
5.3
500
450
400
350
300
250
200
4.7
POWER DISSIPATION vs POWER SUPPLY
3 CH MODE
5
Power Supply Voltage (V)
5.3
®
11 VSP3100
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet VSP3100Y.PDF ] | |
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