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PDF VS3125Q Data sheet ( Hoja de datos )

Número de pieza VS3125Q
Descripción Quad Bus Switch with Individual Active Low Enables
Fabricantes Vaishali Semiconductor 
Logotipo Vaishali Semiconductor Logotipo



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No Preview Available ! VS3125Q Hoja de datos, Descripción, Manual

VS3125
Quad Bus Switch with
Individual Active Low Enables
Applications
= 5v to 3.3V translation in mixed supply environment
= Hot Swap interface
= Video, audio switching
= Clock gating
= Logic replacement
General Description
The VS3125 contains a set of four high-speed, low-resistance bus switches. Each bus switch is individually
controlled by TTL-compatible, active-low control input (/xOE). The low ON resistance of VS3125 allows
inputs to be connected to outputs without adding propagation delay and without generating additional signal
noise.
The VS3125 is function and pinout compatible with QS3125. It enables 5V to 3.3V level translation when
used with an external diode in the power supply line. In addition, the high off-isolation between switch
terminals in the ‘disable’ mode, and the near-zero propagation delay in the ‘on’ state make the VS3V125 an
ideal interface element for hot-swapping applications.
Features
= Enhanced N-FET with no dc path to VCC or
GND in normal operating signal voltage range.
= Low impedance bidirectional data flow
= Pin-compatible with QS3125 & PI5C3125
switches
= Zero added ground bounce or signal noise
= TTL-compatible control signals
= Near-zero propagation delay
= Undershoot clamp diodes on all
switch and control pins
= ESD rating >2000V (Human Body
Model) or >200V (Machine Model)
= Latch-up current >100mA
= Available in 150-mil wide QSOP
package
Figure 1. Functional Block Diagram
1A 2A 3A 4A
/1OE
/2OE
/3OE
/4OE
1Y 2Y 3Y 4Y
Figure 2. Pin Configuration
QSOP
NC
/1OE
1A
1Y
/2OE
2A
2Y
GND
1
2
3
4
5
6
7
8
16 VCC
15 /4OE
14 4A
13 4Y
12 /3OE
11 3A
10 3Y
9 NC
All Pins, Top View
NC= No Connect
2001-04-12
Page 1
MDSS-0011-01
www.vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063

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VS3125Q pdf
VS3125
Table 8. Switching Characteristics Over Operating Range
TA = -40oC to +85oC, VCC = 5V + 10%
CLOAD = 50pF, RLOAD = 500unless otherwise stated.
Symbol Description (1)
tPLH, tPHL
Data Propagation Delay (2,3) through the switch
tPZH, tPZL Switch Turn-on Delay, /xOE to xA or xY
tPLZ, tPHZ
Switch Turn-off Delay (3), /xOE to xA or xY
Min(3)
-
1.5
1.5
Max
0.25
6.5
5.5
Units
ns
ns
ns
Notes:
1. See test circuits and waveforms.
2. This parameter is the calculated theoretical RC time constant of ON-state resistance of the switch and the
specified load capacitance when driven by an ideal voltage source (zero source impedance). This time-constant is
of the order of 0.25ns for VS3125. Since this time-constant is much smaller than rise/fall times of typical driving
signals, it adds very little propagation delay to the system.
3. This parameter is guaranteed, but not production tested.
Figure 6. AC Test Circuit and Switching Waveforms
AC Test Circuit
Pulse
Generator
VIN VOUT
DUT
50
CL
S1
7V
500
450
RL
50=Coax to
Oscilloscope
Load Switch Position
TEST
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
S1
Open
Closed
Open
Input Conditions
1. Input voltage = 0 V to 3.0 V
2. tr = tf = 2.5ns (10% to 90%)
2001-04-12
Page 5
MDSS-0011-01
www.vaishali.com
Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063

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