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Xicor - CPU Supervisor with 4K SPI EEPROM

Numéro de référence X5043V14I
Description CPU Supervisor with 4K SPI EEPROM
Fabricant Xicor 
Logo Xicor 





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X5043V14I fiche technique
4K
X5043/X5045
512 x 8 Bit
CPU Supervisor with 4K SPI EEPROM
FEATURES
• Selectable time out watchdog timer
• Low VCC detection and reset assertion
—Five standard reset threshold voltages
—Re-program low VCC reset threshold voltage
using special programming sequence.
—Reset signal valid to VCC = 1V
• Long battery life with low power consumption
—<50µA max standby current, watchdog on
—<10µA max standby current, watchdog off
—<2mA max active current during read
• 2.7V to 5.5V and 4.5V to 5.5V power supply
versions
• 4Kbits of EEPROM–1M write cycle endurance
• Save critical data with Block Lockmemory
—Protect 1/4, 1/2, all or none of EEPROM array
• Built-in inadvertent write protection
—Write enable latch
—Write protect pin
• 3.3MHz clock rate
• Minimize programming time
—16-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
• SPI modes (0,0 & 1,1)
• Available packages
—8-lead MSOP, 8-lead SOIC, 8-pin PDIP
—14-lead TSSOP
DESCRIPTION
These devices combine four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Block Lock Protect Serial EEPROM
Memory in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscil-
lator to stabilize before the processor executes code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the RESET/
RESET signal. The user selects the interval from three
preset values. Once selected, the interval does not
change, even after cycling the power.
The device’s low VCC detection circuitry protects the
user’s system from low voltage conditions, resetting
the system when VCC falls below the minimum VCC
trip point. RESET/RESET is asserted until VCC returns
to proper operating level and stabilizes. Five industry
standard VTRIP thresholds are available, however,
Xicor’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
WP
SI
SO
SCK
CS/WDI
Data
Register
Command
Decode &
Control
Logic
VCC Threshold
Reset Logic
Watchdog Transition
Detector
Protect Logic
Status
Register
1Kbits
1Kbits
2Kbits
Watchdog
Timer Reset
Reset &
Watchdog
Timebase
RESET/RESET
X5043 = RESET
X5045 = RESET
Power on and
VCC + Low Voltage
Reset
VTRIP
-
Generation
REV 1.1.2 5/29/01
www.xicor.com
Characteristics subject to change without notice. 1 of 20

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