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X25330V14-2.5 fiches techniques PDF

Xicor - 5MHz SPI Serial E 2 PROM with Block Lock TM Protection

Numéro de référence X25330V14-2.5
Description 5MHz SPI Serial E 2 PROM with Block Lock TM Protection
Fabricant Xicor 
Logo Xicor 





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X25330V14-2.5 fiche technique
32K
X25330
4K x 8 Bit
5MHz SPI Serial E2PROM with Block LockTM Protection
FEATURES
5MHz Clock Rate
Low Power CMOS
<1µA Standby Current
<5mA Active Current
2.5V To 5.5V Power Supply
SPI Modes (0,0 & 1,1)
4K X 8 Bits
32 Byte Page Mode
Block Lock™ Protection
Protect 1/4, 1/2 or all of E2PROM Array
Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
Packages
8-Lead SOIC
14-Lead TSSOP
FUNCTIONAL DIAGRAM
STATUS
REGISTER
WRITE
PROTECT
LOGIC
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
DESCRIPTION
The X25330 is a CMOS 32K-bit serial E2PROM, inter-
nally organized as 4K x 8. The X25330 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in
(SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing
any number of devices to share the same bus.
The X25330 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25330 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as
a hardwire input to the X25330 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25330 utilizes Xicor’s proprietary Direct WriteTM
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
X DECODE
LOGIC
32
32
64
4K BYTE
ARRAY
32 X 256
32 X 256
64 X 256
WRITE
CONTROL
AND
WP
TIMING
LOGIC
Direct Writeand Block LockProtection is a trademark of Xicor, Inc.
©Xicor, Inc. 1994 - 1997 Patents Pending
7048–1.0 6/18/97 T0/C0/D0 SH
1
32 8
Y DECODE
DATA REGISTER
7037 FRM F01
Characteristics subject to change without notice

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