X25045V Datasheet PDF - Xicor
| Part Number | X25045V | |
| Description | Programmable Watchdog Supervisory E2PROM | |
| Manufacturers | Xicor | |
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APPLICATION NOTES
AVA I L A B L E
X25043/45AN11 • AN21
4K
X25043/45
512 x 8 Bit
Programmable Watchdog Supervisory E2PROM
FEATURES
• Programmable Watchdog Timer
• Low VCC Detection
• Reset Signal Valid to VCC = 1V
• 1MHz Clock Rate
• 512 X 8 Bits Serial E2PROM
—4 Byte Page Mode
• Low Power CMOS
—50µA Standby Current
—3mA Active Current
• 2.7V To 5.5V Power Supply
• Block LockTM
—Protect 1/4, 1/2 or all of E2PROM Array
• Built-in Inadvertent Write Protection
—Power-Up/Power-Down protection circuitry
—Write Latch
—Write Protect Pin
• High Reliability
—Endurance: 100,000 cycles per byte
—Data Retention: 100 Years
—ESD protection: 2000V on all pins
• Available Packages
—8-Lead PDlP
—8-Lead SOIC
—14-Lead TSSOP
• X25043 = Active LOW RESET
• X25045 = Active HIGH RESET
DESCRIPTION
The X25043/45 combines three popular functions,
Watchdog Timer, Voltage Supervision, and E2PROM in
a single package. This combination lowers the system
cost and reduces the board space requirements.
The Watchdog Timer provides an independent protec-
tion system for microcontrollers. During a system failure,
the X25043/45 watchdog will respond with a RESET/
RESET signal after a selectable time-out interval. The
user selects the interval from three preset values. Once
selected, the interval does not change, even after cy-
cling the power.
The system is protected from low voltage conditions by
the X25043/45 low VCC detection circuits. When VCC
drops below the minimum VCC trip point, the system is
reset. Reset is asserted until VCC returns and stabilizes.
The memory portion of the X25043/45 is a CMOS 4096-
bit serial E2PROM, internally organized as 512 X 8. The
X25043/45 features a Serial Peripheral Interface (SPI)
and software protocol allowing operation on a simple
three-wire bus.
The X25043/45 utilizes Xicor’s proprietary Direct Write™
cell, providing a minimum endurance of 100,000 cycles
per byte and a minimum data retention of 100 years.
DIE PHOTOGRAPH
RESET
CONTROL
LOGIC
PROGRAMMABLE
VOLTAGE
SENSOR
SERIAL
INTERFACE
LOGIC
Direct Write™ is a trademark of Xicor, Inc.
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
3844-6.5 5/9/96 T4/C2/D2 NS
4K BITS E22PROM
HHIIGGHH VVOOLLTTAAGGEE GGEENNEERRAATTOORR
AANNDD
CCOONNTTRROOLL
1
W
A
T
C
H
D
O
T
I
M
E
R
G
3844 ILL F01
Characteristics subject to change without notice
|
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X25043/45
The RESET (X25045) output is designed to go HIGH
whenever VCC has dropped below the minimum trip
point and/or the watchdog timer has reached its pro-
grammable time-out limit.
Operational Notes
The X25043/45 powers-up in the following state:
• The device is in the low power standby state.
• A HIGH to LOW transition on CS is required to
enter an active state and receive an instruction.
• SO pin is high impedance.
• The “write enable” latch is reset.
Figure 1. Read E2PROM Array Operation Sequence
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
• The “write enable” latch is reset upon power-up.
• A WREN instruction must be issued to set the “write
enable” latch.
• CS must come HIGH at the proper clock count in
order to start a write cycle.
The “write enable” latch is reset when WP is brought
LOW.
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22
INSTRUCTION
BYTE ADDRESS
SI 8 7 6 5 4 3 2 1 0
9TH BIT OF ADDRESS
HIGH IMPEDANCE
SO
DATA OUT
76543210
MSB
3844 FHD F04
Figure 2. Read Status Register Operation Sequence
CS
SCK
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
INSTRUCTION
SI
HIGH IMPEDANCE
SO
DATA OUT
76543210
MSB
3844 ILL F15
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for X25045V electronic component. |
| Information | Total 15 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ X25045V.PDF Datasheet ] | |
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