X24F016P-5 Datasheet PDF - Xicor
| Part Number | X24F016P-5 | |
| Description | SerialFlash TM Memory with Block Lock TM Protection | |
| Manufacturers | Xicor | |
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APPLICATION NOTE
A V A I LABLE
AN76 • AN78 • AN81 • AN87
64K/32K/16K
X24F064/032/016
8K/4K/2K x 8 Bit
SerialFlashTM Memory with Block LockTM Protection
FEATURES
• 1.8V to 3.6V or 5V “Univolt” Read and
Program Power Supply Versions
• Low Power CMOS
—Active Read Current Less Than 1mA
—Active Program Current Less Than 3mA
—Standby Current Less Than 1µA
• Internally Organized 8K/4K/2K x 8
• New Programmable Block Lock Protection
—Software Write Protection
—Programmable hardware Write Protect
• Block Lock (0, 1/4, 1/2, or all of the Flash
Memory array)
• 2 Wire Serial Interface
• Bidirectional Data Transfer Protocol
• 32 Byte Sector Programming
• Self Timed Program Cycle
—Typical Programming Time of 5ms
Per Sector
• High Reliability
—Endurance: 100,000 cycles per byte
—Data Retention: 100 Years
• Available Packages
—8-Lead PDIP
—8-Lead SOIC (JEDEC)
—14-Lead TSSOP (X24F032/016)
—20-Lead TSSOP (X24F064)
DESCRIPTION
The X24F064/032/016 is a CMOS SerialFlash
Memory Family, internally organized 8K/4K/2K x 8.
The family features a serial interface and software
protocol allowing operation on a simple two wire bus.
Device select inputs (S0, S1, S2) allow up to eight
devices to share a common two wire bus.
A Program Protect Register accessed at the highest
address location, provides three new programming
protection features: Software Programming Protection,
Block Lock Protection, and Hardware Programming
Protection. The Software Programming Protection
feature prevents any nonvolatile writes to the device
until the WEL bit in the program protect register is set.
The Block LockTM Protection feature allows the user to
individually protect four blocks of the array by program-
ming two bits in the programming protect register. The
Programmable Hardware Program Protect feature
allows the user to install each device with PP tied to
VCC, program the entire memory array in place, and
then enable the hardware programming protection by
programming a PPEN bit in the program protect
register. After this, selected blocks of the array,
including the program protect register itself, are
permanently protected from being programmed.
FUNCTIONAL DIAGRAM
SDA
SCL
DATA REGISTER
SECTOR DECODE LOGIC
32 8
S0/S0
S1/S1
S2/S2
COMMAND
DECODE
AND CONTROL
LOGIC
X
DECODE
LOGIC
PROGRAM
PROTECT
REGISTER
SECTORED
MEMORY
ARRAY
PP
PROGRAMMING
CONTROL LOGIC
SerialFlash™ Memory and Block Lock™
Protection are trademarks of Xicor, Inc.
©Xicor, 1995, 1996 Patents Pending
6686-3.8 8/29/96 T3/C0/D0 SH
1
HIGH VOLTAGE
CONTROL
6686 ILL F01.5
Characteristics subject to change without notice
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X24F064/032/016
DEVICE ADDRESSING
Following a start condition the master must output the
address of the slave it is accessing (see Figure 4). The
next two bits are the device select bits. A system could
have up to eight X24F032/016’s on the bus or up to
four 24F064’s on the bus. The device addresses are
defined by the state of the S0, S1, and S2 inputs. Note
some of the slave addresses must be the inverse of
the corresponding input pin.
Figure 4. Slave Address
DEVICE
SELECT
X24F064
HIGH ORDER
SECTOR ADDRESS
S2 S1 A12 A11 A10 A9 A8 R/W
DEVICE
SELECT
X24F032
HIGH ORDER
SECTOR ADDRESS
S2 S1 S0 A11 A10 A9 A8 R/W
DEVICE
TYPE
IDENTIFIER
DEVICE
SELECT
X24F016
HIGH ORDER
SECTOR ADDRESS
1 S2 S1 S0 A10 A9 A8 R/W
6686 ILL F07.4
Figure 5. Sector Programming
Also included in the slave address is an extension of
the array’s address which is concatenated with the
eight bits of address in the sector address field,
providing direct access to the entire SerialFlash
Memory array.
The last bit of the slave address defines the operation
to be performed. When set HIGH a read operation is
selected, when set LOW a program operation is
selected.
Following the start condition, the X24F064/032/016
monitors the SDA bus comparing the slave address
being transmitted with its slave address device type
identifier. Upon a correct comparison of the device
select inputs, the X24F064/032/016 outputs an
acknowledge on the SDA line. Depending on the state
of the R/W bit, the X24F064/032/016 will execute a
read or program operation.
PROGRAMMING OPERATIONS
The X24F064/032/016 offers a 32-byte sector pro-
gramming operation. For a program operation, the
X24F064/032/016 requires a second address field.
This field contains the address of the first byte in the
sector. Upon receipt of the address, comprised of
eight bits, the X24F064/032/016 responds with an ac-
knowledge and awaits the next eight bits of data,
again responding with an acknowledge. The master
then transmits 31 more bytes. After the receipt of
each byte, the X24F064/032/016 will respond with an
acknowledge.
BUS ACTIVITY:
MASTER
SDA LINE
S
T
A
R
SLAVE
ADDRESS
T
S
BUS ACTIVITY:
X24F016/032/064
SECTOR ADDRESS
AA
CC
KK
DATA n
DATA n+1
AA
CC
KK
DATA n+31
S
T
O
P
P
A
C
K
6686 ILL F10.3
5
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| Information | Total 18 Pages | |
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Featured Datasheets
| Part Number | Description | MFRS |
| X24F016P-5 | The function is SerialFlash TM Memory with Block Lock TM Protection. Xicor | |
| X24F016P-5 | The function is SerialFlash TM Memory with Block Lock TM Protection. Xicor | |
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