X24164 Datasheet PDF - Xicor
| Part Number | X24164 | |
| Description | Serial E2PROM | |
| Manufacturers | Xicor | |
| Logo |  |
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XPr2e4li1m6in4ary Information
16K
X24164
Serial E2PROM
2048 x 8 Bit
FEATURES
• 2.7V to 5.5V Power Supply
• Low Power CMOS
—Active Read Current Less Than 1 mA
—Active Write Current Less Than 3 mA
—Standby Current Less Than 50 µA
• Internally Organized 2048 x 8
• 2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
• Sixteen Byte Page Write Mode
—Minimizes Total Write Time Per Byte
• Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
• High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
• Pin and Function Compatible with X24C16
• 8-Pin Plastic DIP and 8-Lead SOIC Packages
DESCRIPTION
The X24164 is a CMOS 16,384 bit serial E2PROM,
internally organized 2048 x 8. The X24164 features a
serial interface and software protocol allowing operation
on a simple two wire bus.
Three device select inputs (S0–S2) allow up to eight
devices to share a common two wire bus.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
FUNCTIONAL DIAGRAM
(8) VCC
(4) VSS
(5) SDA
START
STOP
LOGIC
START CYCLE
H.V. GENERATION
TIMING
& CONTROL
(6) SCL
(3) S2
(2) S1
(1) S0
SLAVE ADDRESS
REGISTER
+COMPARATOR
CONTROL
LOGIC
LOAD
INC
WORD
ADDRESS
COUNTER
R/W
DOUT
ACK
PIN
XDEC
E2PROM
128 X 128
YDEC
8
CK DATA REGISTER DOUT
3846 FHD F01
© Xicor, 1991 Patents Pending
3846-1.2 7/30/96 T0/C1/D1 SH
1 Characteristics subject to change without notice
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X24164
DEVICE ADDRESSING
Following a start condition the master must output the
address of the slave it is accessing. The most significant
bit of the slave is a one (see Figure 4). The next three bits
are the device select bits. A system could have up to
eight X24164’s on the bus. The eight addresses are
defined by the state of the S0, S1, and S2 inputs. S1 of the
slave address must be the inverse of the S1 input pin.
Figure 4. Slave Address
DEVICE
SELECT
HIGH
ORDER
WORD
ADDRESS
1 S2 S1 S0 A2 A1 A0 R/W
3846 FHD F10
The next three bits of the slave address are an extension
of the array’s address and are concatenated with the
eight bits of address in the word address field, providing
direct access to the whole 2048 x 8 array.
Figure 5. Byte Write
The last bit of the slave address defines the operation to
be performed. When set to one a read operation is
selected, when set to zero a write operation is selected.
Following the start condition, the X24164 monitors the
SDA bus comparing the slave address being transmit-
ted with its slave address device type identifier. Upon a
correct compare the X24164 outputs an acknowledge
on the SDA line. Depending on the state of the R/W bit,
the X24164 will execute a read or write operation.
WRITE OPERATIONS
Byte Write
For a write operation, the X24164 requires a second
address field. This address field is the word address,
comprised of eight bits, providing access to any one of
2048 words in the array. Upon receipt of the word
address the X24164 responds with an acknowledge,
and awaits the next eight bits of data, again responding
with an acknowledge. The master then terminates the
transfer by generating a stop condition, at which time the
X24164 begins the internal write cycle to the nonvolatile
memory. While the internal write cycle is in progress the
X24164 inputs are disabled, and the device will not
respond to any requests from the master. Refer to
Figure 5 for the address, acknowledge and data transfer
sequence.
S
T
BUS ACTIVITY: A
MASTER
R
T
SLAVE
ADDRESS
WORD
ADDRESS
SDA LINE
S
BUS ACTIVITY:
X24164
AA
CC
KK
DATA
S
T
O
P
P
A
C
K
3846 FHD F11
5
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for X24164 electronic component. |
| Information | Total 14 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ X24164.PDF Datasheet ] | |
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