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PDF X9252 Data sheet ( Hoja de datos )
| Número de pieza | X9252 | |
| Descripción | Quad Digitally-Controlled (XDCP) potentiometer | |
| Fabricantes | Xicor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de X9252 (archivo pdf) en la parte inferior de esta página. Total 21 Páginas | ||
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New Feature
Dual Interface
Low Power + Quad 256-tap +
2-Wire bus + Up/Down interface
Quad Digitally-Controlled (XDCPTM) Potentiometer
X9252
FEATURES
• Quad solid state potentiometer
• 256 wiper tap points–0.4% resolution
• 2-wire serial interface for Write, Read, and
transfer operations of the potentiometer
• Up/down interface for individual potentiometers
• Wiper resistance: 40Ω typical
• Non-volatile storage of wiper positions
• Power On Recall. Loads saved wiper position on
Power-Up.
• Standby current < 20µA Max
• Maximum wiper current: 3mA
• VCC: 2.7V to 5.5V operation
• 2.8kΩ,10kΩ, 50kΩ, 100kΩ version of total pot
resistance
• Endurance: 100, 000 data changes per bit per
register
• 100 yr. data retention
• 24-Lead TSSOP
DESCRIPTION
The X9252 integrates 4 digitally controlled potentio-
meters (XDCP) on a monolithic CMOS integrated
circuit.
The digitally controlled potentiometers are imple-
mented using 255 resistive elements in a series array.
Between each pair of elements are tap points con-
nected to wiper terminals through switches. The posi-
tion of each wiper on the array is controlled by the user
through the Up/Down (U/D) or 2-wire bus interface.
The wiper of each potentiometer has an associated
volatile Wiper Counter Register (WCR) and four non-
volatile Data Registers (DRs) that can be directly writ-
ten to and read by the user. The contents of the WCR
controls the position of the wiper on the resistor array
though the switches. At power-up, the device recalls
the contents of the default data registers DR00, DR10,
DR20, DR30, to the corresponding WCR.
Each DCP can be used as a three-terminal potentio-
meter or as a two terminal variable resistor in a wide
variety of applications including the programming of
bias voltages, the implementation of ladder networks,
and three resistor programmable networks.
FUNCTIONAL DIAGRAM
A2
A1
A0
SDA
SCL
DS0
DS1
CS
U/D
VCC
2-Wire
Interface
Up-Down
Interface
POWER UP,
INTERFACE
CONTROL
AND
STATUS
VSS
RH0
RH1
RH2
RH3
WCR0
DR00
DR01
DR02
DR03
DCP0
WCR1
DR10
DR11
DR12
DR13
DCP1
WCR2
DR20
DR21
DR22
DR23
DCP2
WCR3
DR30
DR31
DR32
DR33
DCP3
WP
RW0 RL0
RW1 RL1
RW2 RL2
RW3 RL3
REV 1.4.1 7/29/03
www.xicor.com
1 of 21
1 page  
X9252
D.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Symbol
ICC1
Parameter
VCC supply current
(Volatile write/read)
ICC2
ICC3
VCC supply current
(active)
VCC supply current
(nonvolatile write)
ISB VCC current (standby)
IL Leakage current, bus
interface pins
VIH Input HIGH voltage
VIL Input LOW voltage
VOL SDA pin output LOW
voltage
Min.
-10
Limits
Max.
3
3
5
20
10
Units
mA
mA
mA
µA
µA
Test Conditions
fSCL = 400kHz;SDA = Open; (for 2-Wire,
Active, Read and Volatile Write States
only)
fSCL = 200kHz; (for U/D interface,
increment, decrement)
fSCL = 400kHz; SDA = Open;
(for 2-Wire, Active, Nonvolatile Write State
only)
VCC = +5.5V; VIN = VSS or VCC; SDA =
VCC; (for 2-Wire, Standby State only)
Voltage at pin from VSS to VCC
VCC x 0.7 VCC + 1
V
–1 VCC x 0.3 V
0.4 V IOL = 3mA
ENDURANCE AND DATA RETENTION
Parameter
Minimum endurance
Data retention
Min.
100,000
100
Units
Data changes per bit
Years
CAPACITANCE
Symbol
CIN/OUT(5)
CIN(5)
Test
Input / Output capacitance (SDA)
Input capacitance (SCL, WP, DS0, DS1, CS, U/D,
A2, A1 and A0)
Max.
8
6
Units
pF
pF
Test Conditions
VOUT = 0V
VIN = 0V
POWER-UP TIMING
Symbol
tD(5)(9)
Parameter
Power Up Delay from VCC power up (VCC
above 2.7V) to wiper position recall com-
pleted, and communication interfaces ready
for operation.
Max.
2
Units
ms
A.C. TEST CONDITIONS
Input Pulse Levels
Input rise and fall times
Input and output timing threshold level
External load at pin SDA
VCC x 0.1 to VCC x 0.9
10ns
VCC x 0.5
2.3kΩ to VCC and 100 pF to VSS
REV 1.4.1 7/29/03
www.xicor.com
5 of 21
5 Page 
X9252
UP/DOWN INTERFACE OPERATION
The SCL, U/D, CS, DS0 and DS1 inputs control the
movement of the wiper along the resistor array. With
CS set LOW the device is selected and enabled to
respond to the U/D and SCL inputs. HIGH to LOW
transitions on SCL will increment or decrement
(depending on the state of the U/D input) a wiper
counter register selected by DS0 and DS1. The output
of this counter is decoded to select one of 256 wiper
positions along the resistor array.
The value of the counter is stored in nonvolatile Data
Registers DRi0 whenever CS transitions HIGH while
the SCL and WP inputs are HIGH. “i” indicates the
DCP number selected with pins DS1 and DS0. During
a “Store” operation bits DRSel1 and DRSel0 in the
Status Register must be both “0”, which is their power
up default value. Other combinations are reserved and
must not be used.
The system may select the X9252, move the wiper,
and deselect the device without having to store the lat-
est wiper position in nonvolatile memory. After the
wiper movement is performed as described above and
once the new position is reached, the system must
keep SCL LOW while taking CS HIGH. The new wiper
postion will be maintained until changed by the system
or until a power-down/up cycle recalled the previousely
stored data.
This procedure allows the system to always power-up
to a preset value stored in nonvolatile memory; then
during system operation minor adjustments could be
made. The adjustments might be based on user prefer-
ence, system parameter changes due to temperaure
drift, etc.
The state of U/D may be changed while CS remains
LOW. This allows the host system to enable the device
and then move the wiper up and down until the proper
trim is attained. The 2-wire interface is disabled while
CS remains LOW.
Table 1. DCP Selection for Up/Down Control
DS1 DS0 Selected DCP
00
DCP0
01
10
DCP1
DCP2
11
DCP3
MODE SELECTION FOR UP/DOWN CONTROL
CS SCL U/D
Mode
L H Wiper Up
L L Wiper Down
H X Store Wiper Position to non-
volatile memory if WP pin is
high. No store, return to stand-
by, if WP pin is low.
H X X Standby
L X No Store, Return to Standby
L H Wiper Up (not recommended)
L L Wiper Down
(not recommended)
REV 1.4.1 7/29/03
www.xicor.com
11 of 21
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| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet X9252.PDF ] | |
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