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Z8C520 fiches techniques PDF

Zilog. - 1.5 MBPS USB Device Controller

Numéro de référence Z8C520
Description 1.5 MBPS USB Device Controller
Fabricant Zilog. 
Logo Zilog. 





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Z8C520 fiche technique
PRELIMINARY PRODUCT SPECIFICATION
Z8E520/C520
1
1.5 MBPS USB LOW-POWER
DEVICE CONTROLLER FOR
MULTIPROTOCOL POINTING DEVICES
FEATURES
Part
Number
Z8E520 (OTP)
Z8C520 (ROM)
ROM
(KB)
6
6
RAM
(Bytes)
176
176
Speed
(MHz)
12
12
s Six Vectored Interrupts with Fixed Priority
s Processor Speed Dividable by Firmware Control
s Operating Current: 5 mA typical in USB Mode; 2.5 mA
typical in Serial Mode (@ 3 MHz); 5 mA typical in PS/2
Mode
s 16 Total Input/Output Pins (Open-Drain/Push-Pull)
Configurable
s 6 inputs with 3 level Programmable Reference
Comparators
s 16-Bit Programmable Watch-Dog Timer (WDT) with
Internal RC Oscillator
s Software Programmable Timers Configurable as:
– Two 8-Bit Standard Timers and One 16-Bit
Standard Timer or
– One 16-Bit Standard Timer and One 16-Bit Pulse
Width Modulator (PWM) Timer
s Identical Masked ROM Version (Z8C520)
s On-Chip Oscillator that accepts a Ceramic Resonator or
External Clock
s Hardware Support for PS/2, Serial, USB, and General-
Purpose I/O (GPIO)
s Power Reduction Modes:
– STOP Mode (functionality shut down except SMR)
– HALT Mode (XTAL still running-peripherals active)
s USB SIE Compliant with USB Spec 1.0
s 4.0 VDC to 6.0 VDC Operating Range @ 0°C to +70°C
GENERAL DESCRIPTION
Zilog’s Z8E520 (OTP) and Z8C520 (Masked ROM) micro-
controllers are low-power Z8Plus MCUs, designed for the
cost-effective implementation of USB and multiprotocol
pointing devices.
For applications demanding powerful I/O capabilities, the
Z8E520's input and output lines are grouped into two ports,
and are configurable under software control to provide tim-
ing, status signals, or parallel I/O.
Both 8-bit and 16-bit timers, with a large number of user se-
lectable modes, off-load the system of administering real-
time tasks such as counting/timing and I/O data communi-
cations.
The microcontroller clock frequency is derived from the
system clock by a programmable divider under firmware
control.
The device is capable of functioning in four distinct, select-
able communications modes: PS/2, RS232, GPIO (Gener-
al-purpose I/O), and USB. The communications mode de-
termines the functionality of the two special serial
communications pins (PB6 and PB7). The device is placed
in the required mode when firmware sets the specified
mode bit in the communications control register. The firm-
ware interface is similar in all modes. The same buffer area
in RAM will accept the data to be transmitted. Up to 8 bytes
may be loaded, and the data will actually be transmitted as
soon as the appropriate command is issued (setting In
Packet Ready in USB mode, for example).
DS97KEY2005
PRELIMINARY
1

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